Abstract: A bistable logic device, of the RSTT type, operating up to X band. The bistable logic device is organized into three stages: an input stage of four NOR operators (21, 31, 41, 51), a second stage of two OR operators (61, 71) and an output stage of two OR operators (62, 72). Each NOR operator of the input stage drives in parallel an OR operator of the second stage and an OR operator of the output stage. Each of the four OR operators are fed back to an input of one of the four NOR operators of the input stage. The organization in logic NOR/OR form makes it possible to use faster single gate transistors. The present invention may be particularly useful to frequency dividers for interfacing between signals at GHz frequency and measurement and control circuits at MHz frequency.