Patents by Inventor Erng Sing Wee

Erng Sing Wee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11036267
    Abstract: In the event of a TDM failure, the associated computing device is either discarded or sent back to an original equipment manufacturer's facility for refurbishment. Field replacement of TDMs is typically not possible due to the lack of a secure process to recalibrate the touch controller to function properly with a replacement TDM. The presently disclosed systems and methods enable secure recalibration of a touch controller within a computing device to operate correctly with a new TDM field installed in the computing device. More specifically, the presently disclosed systems and methods provide a mechanism for detecting that a TDM has been field replaced, unlocking calibration data, performing a calibration process, and locking the new calibration data.
    Type: Grant
    Filed: February 26, 2019
    Date of Patent: June 15, 2021
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Srilatha Sridharan, John Schock, Kansu Dincer, Dennis Mamati Wavomba, Erng-Sing Wee, Dmitry Birenberg
  • Patent number: 10928885
    Abstract: Power reduction and voltage adjustment techniques for computing systems and processing devices are presented herein. In one example, a method includes executing a voltage characterization service for a processing device of a computing apparatus to determine at least one supply voltage for the processing device, the voltage characterization service comprising a functional test that exercises the processing device at iteratively adjusted voltages in context with associated system elements of the computing apparatus. During execution of the voltage characterization service, the method includes monitoring for operational failures of at least the processing device, and responsive to the operational failures, determining at least one resultant supply voltage.
    Type: Grant
    Filed: January 28, 2019
    Date of Patent: February 23, 2021
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: William Paul Hovis, Garrett Douglas Blankenburg, Peter Anthony Atkinson, Robert James Ray, Andres Felipe Hernandez Mojica, Samy Boshra-Riad, Erng-Sing Wee, Brian Keith Langendorf
  • Publication number: 20200272213
    Abstract: In the event of a TDM failure, the associated computing device is either discarded or sent back to an original equipment manufacturer's facility for refurbishment. Field replacement of TDMs is typically not possible due to the lack of a secure process to recalibrate the touch controller to function properly with a replacement TDM. The presently disclosed systems and methods enable secure recalibration of a touch controller within a computing device to operate correctly with a new TDM field installed in the computing device. More specifically, the presently disclosed systems and methods provide a mechanism for detecting that a TDM has been field replaced, unlocking calibration data, performing a calibration process, and locking the new calibration data.
    Type: Application
    Filed: February 26, 2019
    Publication date: August 27, 2020
    Inventors: Srilatha SRIDHARAN, John SCHOCK, Kansu DINCER, Dennis Mamati WAVOMBA, Erng-Sing WEE, Dmitry BIRENBERG
  • Patent number: 10338670
    Abstract: Voltage adjustment techniques for computing systems and processing devices are presented herein. In one example, a method of determining operating voltages for a processing device includes executing a voltage adjustment process to determine at least one input voltage for the processing device lower than a manufacturer specified operating voltage. During the voltage adjustment process, the method includes applying incrementally adjusted input voltages to the processing device, operating the processing device according to a functional test that exercises the processing device in context with associated system elements of a computing assembly, and monitoring for operational failures of at least the processing device during application of each of the incrementally adjusted input voltages.
    Type: Grant
    Filed: June 10, 2016
    Date of Patent: July 2, 2019
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: William Paul Hovis, Garrett Douglas Blankenburg, Peter Anthony Atkinson, Robert James Ray, Andres Felipe Hernandez Mojica, Samy Boshra-Riad, Erng-Sing Wee, Brian Keith Langendorf
  • Publication number: 20190171278
    Abstract: Power reduction and voltage adjustment techniques for computing systems and processing devices are presented herein. In one example, a method includes executing a voltage characterization service for a processing device of a computing apparatus to determine at least one supply voltage for the processing device, the voltage characterization service comprising a functional test that exercises the processing device at iteratively adjusted voltages in context with associated system elements of the computing apparatus. During execution of the voltage characterization service, the method includes monitoring for operational failures of at least the processing device, and responsive to the operational failures, determining at least one resultant supply voltage.
    Type: Application
    Filed: January 28, 2019
    Publication date: June 6, 2019
    Inventors: William Paul Hovis, Garrett Douglas Blankenburg, Peter Anthony Atkinson, Robert James Ray, Andres Felipe Hernandez Mojica, Samy Boshra-Riad, Erng-Sing Wee, Brian Keith Langendorf
  • Patent number: 10310572
    Abstract: Thermal reduction and voltage adjustment techniques for computing systems and processing devices are presented herein. In a first example, a method of operating a voltage control system for a processing device includes operating the processing device in a computing assembly at a selected performance level, the processing device supplied with at least one input voltage at a first voltage level. The method includes monitoring thermal information associated with the computing assembly, and when the thermal information indicates a temperature associated with the computing assembly exceeds a threshold temperature, adjusting the at least one input voltage level supplied to the processing device to a second voltage level lower than the first voltage level and continuing to operate the processing device at the selected performance level.
    Type: Grant
    Filed: June 10, 2016
    Date of Patent: June 4, 2019
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: William Paul Hovis, Garrett Douglas Blankenburg, Peter Anthony Atkinson, Robert James Ray, Andres Felipe Hernandez Mojica, Samy Boshra-Riad, Erng-Sing Wee, Brian Keith Langendorf
  • Patent number: 10248186
    Abstract: Power reduction and voltage adjustment techniques for computing systems and processing devices are presented herein. In one example, a method includes receiving a voltage characterization service over a communication interface of the computing apparatus as transferred by a deployment platform remote from the computing apparatus. The method includes executing the voltage characterization service for a processing device of the computing apparatus to determine at least one input voltage for the processing device lower than a manufacturer specified operating voltage, the voltage characterization service comprising a functional test that exercises the processing device at iteratively adjusted voltages in context with associated system elements of the computing apparatus.
    Type: Grant
    Filed: June 10, 2016
    Date of Patent: April 2, 2019
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: William Paul Hovis, Garrett Douglas Blankenburg, Peter Anthony Atkinson, Robert James Ray, Andres Felipe Hernandez Mojica, Samy Boshra-Riad, Erng-Sing Wee, Brian Keith Langendorf
  • Patent number: 10209726
    Abstract: Secure voltage adjustment techniques for computing systems and processing devices are presented herein. In one example, a method of controlling operating voltages for a processing device includes initializing a security portion of the processing device after application of input voltages to the processing device as supplied by voltage regulation circuitry according to voltage identifiers (VIDs) established for the processing device. The method includes, in the security portion, generating adjusted input voltages based on at least the VIDs and authenticated voltage offset information stored according to a digitally signed security process, and instructing the voltage regulation circuitry to supply the adjusted input voltages to the processing device.
    Type: Grant
    Filed: June 10, 2016
    Date of Patent: February 19, 2019
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: William Paul Hovis, Garrett Douglas Blankenburg, Peter Anthony Atkinson, Robert James Ray, Andres Felipe Hernandez Mojica, Samy Boshra-Riad, Erng-Sing Wee, Brian Keith Langendorf
  • Publication number: 20170357298
    Abstract: Thermal reduction and voltage adjustment techniques for computing systems and processing devices are presented herein. In a first example, a method of operating a voltage control system for a processing device includes operating the processing device in a computing assembly at a selected performance level, the processing device supplied with at least one input voltage at a first voltage level. The method includes monitoring thermal information associated with the computing assembly, and when the thermal information indicates a temperature associated with the computing assembly exceeds a threshold temperature, adjusting the at least one input voltage level supplied to the processing device to a second voltage level lower than the first voltage level and continuing to operate the processing device at the selected performance level.
    Type: Application
    Filed: June 10, 2016
    Publication date: December 14, 2017
    Inventors: William Paul Hovis, Garrett Douglas Blankenburg, Peter Anthony Atkinson, Robert James Ray, Andres Felipe Hernandez Mojica, Samy Boshra-Riad, Erng-Sing Wee, Brian Keith Langendorf
  • Publication number: 20170357311
    Abstract: Power reduction and voltage adjustment techniques for computing systems and processing devices are presented herein. In one example, a method includes receiving a voltage characterization service over a communication interface of the computing apparatus as transferred by a deployment platform remote from the computing apparatus. The method includes executing the voltage characterization service for a processing device of the computing apparatus to determine at least one input voltage for the processing device lower than a manufacturer specified operating voltage, the voltage characterization service comprising a functional test that exercises the processing device at iteratively adjusted voltages in context with associated system elements of the computing apparatus.
    Type: Application
    Filed: June 10, 2016
    Publication date: December 14, 2017
    Inventors: William Paul Hovis, Garrett Douglas Blankenburg, Peter Anthony Atkinson, Robert James Ray, Andres Felipe Hernandez Mojica, Samy Boshra-Riad, Erng-Sing Wee, Brian Keith Langendorf
  • Publication number: 20170357310
    Abstract: Voltage adjustment techniques for computing systems and processing devices are presented herein. In one example, a method of determining operating voltages for a processing device includes executing a voltage adjustment process to determine at least one input voltage for the processing device lower than a manufacturer specified operating voltage. During the voltage adjustment process, the method includes applying incrementally adjusted input voltages to the processing device, operating the processing device according to a functional test that exercises the processing device in context with associated system elements of a computing assembly, and monitoring for operational failures of at least the processing device during application of each of the incrementally adjusted input voltages.
    Type: Application
    Filed: June 10, 2016
    Publication date: December 14, 2017
    Inventors: William Paul Hovis, Garrett Douglas Blankenburg, Peter Anthony Atkinson, Robert James Ray, Andres Felipe Hernandez Mojica, Samy Boshra-Riad, Erng-Sing Wee, Brian Keith Langendorf
  • Publication number: 20170357279
    Abstract: Secure voltage adjustment techniques for computing systems and processing devices are presented herein. In one example, a method of controlling operating voltages for a processing device includes initializing a security portion of the processing device after application of input voltages to the processing device as supplied by voltage regulation circuitry according to voltage identifiers (VIDs) established for the processing device. The method includes, in the security portion, generating adjusted input voltages based on at least the VIDs and authenticated voltage offset information stored according to a digitally signed security process, and instructing the voltage regulation circuitry to supply the adjusted input voltages to the processing device.
    Type: Application
    Filed: June 10, 2016
    Publication date: December 14, 2017
    Inventors: William Paul Hovis, Garrett Douglas Blankenburg, Peter Anthony Atkinson, Robert James Ray, Andres Felipe Hernandez Mojica, Samy Boshra-Riad, Erng-Sing Wee, Brian Keith Langendorf
  • Patent number: 6920470
    Abstract: A low power programmable digital filter integrated circuit architecture has a programmable front end servicing up to 4 digital sources. Changing the programming of the front end permits digital outputs from different sensor types to be accommodated. Digital filtering is accomplished using a digital signal processor that is programmable to accommodate different decimation ratios. A serial data output register receives the filtered digital signals and provides them to an output port. The digital filter integrated circuit may be connected in a token passing configuration with other digital filter integrated circuits to increase the number of sources accommodated.
    Type: Grant
    Filed: March 8, 2001
    Date of Patent: July 19, 2005
    Assignee: Cirrus Logic, Inc.
    Inventors: Joel Page, Trenton John Grale, Zhuan Ye, Erng Sing Wee, Sumant Sathe, Sijiam Chen
  • Publication number: 20040225809
    Abstract: A low power programmable digital filter integrated circuit architecture has a programmable front end servicing up to 4 digital sources. Changing the programming of the front end permits digital outputs from different sensor types to be accommodated. Digital filtering is accomplished using a digital signal processor that is programmable to accommodate different decimation ratios.
    Type: Application
    Filed: March 8, 2001
    Publication date: November 11, 2004
    Inventors: Erng Sing Wee, Joel Page, Wai Lang Lee
  • Publication number: 20020129073
    Abstract: A low power programmable digital filter integrated circuit architecture has a programmable front end servicing up to 4 digital sources. Changing the programming of the front end permits digital outputs from different sensor types to be accommodated. Digital filtering is accomplished using a digital signal processor that is programmable to accommodate different decimation ratios. A serial data output register receives the filtered digital signals and provides them to an output port. The digital filter integrated circuit may be connected in a token passing configuration with other digital filter integrated circuits to increase the number of sources accommodated.
    Type: Application
    Filed: March 8, 2001
    Publication date: September 12, 2002
    Inventors: Joel Page, Trenton John Grale, Zhuan Ye, Erng Sing Wee, Sumant Sathe, Sijiam Chen