Abstract: An endoscope with a digital viewing system, such as a digital camera, with a housing having a longitudinal axis, with a lens attached to the housing and with an electronic image sensor positioned in the interior of the housing for converting a picture delivered through the lens into a digital format, characterized in that the image sensor is movable transverse to or out of the longitudinal axis. The movement of the image sensor facilitates focusing.

Abstract: A method and a system is provided that includes a multifrequency generator supplying signals of at least three different frequencies to an electrode assembly, the capacitance of which is detected for a plurality of different frequency points. In this way, the capacitance of the electrode assembly, which is influenced by a substance present in the vicinity of the electrode assembly, may be reliably identified. Preferably, the conditions of a road surface may be reliably monitored.

Abstract: A method and a system is provided that includes a multifrequency generator supplying signals of at least three different frequencies to an electrode assembly, the capacitance of which is detected for a plurality of different frequency points. In this way, the capacitance of the electrode assembly, which is influenced by a substance present in the vicinity of the electrode assembly, may be reliably identified. Preferably, the conditions of a road surface may be reliably monitored.

Abstract: A cell of MOS transistors for converting a voltage into a current for forming synapses of neural nets, in particular for converting the difference between an input voltage (V.sub.IN) and a voltage (V.sub.W) for weighting the synapse into a current, realized by means of a differential stage comprising a first transistor (M1) operating as a current generator, in which a first and a second branch in parallel end, which branches respectively comprise a second (M2) and a third (M3) push-pull connected transistor, to the gate regions of which the input voltage (V.sub.IN) and the voltage (V.sub.W) for weighting the synapse, and to which a fourth (M4) and a fifth (M5) transistor are respectively connected in series, in which the fourth (M4) and the fifth (M5) transistor are P-MOS transistors having their gate regions short-circuited and said fourth (M4) P-MOS transistor is connected as a diode, and in which the output current (I.sub.

Abstract: Integrated circuit with a non-volatile variable resistor which is particularly adapted for use in a neuronic network. The integrated circuit comprises a symmetrically replicated structure including a floating gate MOS transistor (TRP; TRN) and an EEPROM memory cell based upon N-channel MOS transistors and including a read-out MOS transistor (TSP; TSN) and a tunnel-effect charge injection MOS element (TUNP; TUNN), with floating gates. The floating gates of all transistors and of the tunnel-effect element are connected together, with the ends of the resistor (R1P, R2P; R1N, R2N) being taken out from the source and drain regions of the floating gate MOS transistor.