Abstract: A parallel channel timing recovery circuit. The parallel timing recovery circuit comprises multiple prefilters receiving parallel channel outputs and providing prefilter outputs. Multiple sampling filters receive the prefilter outputs and provide multiple discrete time signal samples. A self-timing circuit has multiple inputs receiving the multiple discrete time signal samples. The self-timing circuit provides a sampling control output to the sampling filters. The sampling control output is based on a composite of the multiple discrete time signal samples. Each of the sampling filters generates a discrete time signal sample based on the sampling control output and the prefilter outputs.

Abstract: A data storage system in which multiple readback signals are resolved is provided. The data storage system includes a data storage medium configured to store servo marks and data marks. The data storage medium has tracks that are divided into sectors. An array of heads is configured to interact with the data storage medium. A demodulation circuit receives servo signals obtained by at least some heads of the array of heads and computes a resultant servo signal, which is used to adjust a position of the array of heads over the storage medium.

Abstract: A method of generating low density parity check codes for encoding data includes constructing a parity check matrix H from balanced incomplete block design (BIBD) in which a plurality B-sets which define the matrix have no more than one intersection point. The parity bits are then generated as a function of the constructed parity check matrix H.

Abstract: A method of encoding digital information in order to suppress dc includes the steps of receiving a sequence of m message bits of a message word, and mapping the sequence of m message bits of the message word to a codeword, of length n bits, generated from the m message bits using algebraic operations. Multiple codeword candidates are generated from the m message bits using the algebraic operations to combine the m message bits with different periodic scrambling sequences. One of the codeword candidates is selected for mapping based upon an optimizing criteria. Second order digital sum sequences, corresponding to each of the plurality of codeword candidates, can be used as the optimizing criteria to select the codeword.

Abstract: A disc drive data recovery system for recovering data from a magnetic disc having asperities provided. Readback data follows a nominal readback path and a thermal asperity cancellation readback path. A thermal asperity detector detects a thermal asperity in the readback signal and responsively selects the readback signal which follows the thermal asperity cancellation readback path.

Abstract: A disc drive data recovery system for recovering data from a magnetic disc having asperities provided. Readback data follows a nominal readback path and a thermal asperity cancellation readback path. A thermal asperity detector detects a thermal asperity in the readback signal and responsively selects the readback signal which follows the thermal asperity cancellation readback path.

Abstract: A method of encoding digital information in order to suppress dc includes the steps of receiving a sequence of m message bits of a message word, and mapping the sequence of m message bits of the message word to a codeword, of length n bits, generated from the m message bits using algebraic operations. Multiple codeword candidates are generated from the m message bits using the algebraic operations to combine the m message bits with different periodic scrambling sequences. One of the codeword candidates is selected for mapping based upon an optimizing criteria. Second order digital sum sequences, corresponding to each of the plurality of codeword candidates, can be used as the optimizing criteria to select the codeword.

Abstract: A method of generating low density parity check codes for encoding data includes constructing a parity check matrix H from balanced incomplete block design (BIBD) in which a plurality B-sets which define the matrix have no more than one intersection point. The parity bits are then generated as a function of the constructed parity check matrix H.