Patents by Inventor Ershad Ali
Ershad Ali has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12021003Abstract: A semiconductor device package includes a semiconductor die having two largest dimensions that define a major plane, a packaging material enclosing the semiconductor die, a plurality of contacts on a first exterior surface of the semiconductor device package that is parallel to the major plane, the first exterior surface defining a bottom of the semiconductor device package, and a pedestal of semiconductor material above the semiconductor die in a thermally-conductive, electrically non-conductive relationship with the semiconductor die. The semiconductor material of the pedestal may be doped to provide electromagnetic shielding of the semiconductor die.Type: GrantFiled: August 12, 2021Date of Patent: June 25, 2024Assignee: Marvell Asia Pte, Ltd.Inventors: Han Gao, Ershad Ali, Shrinath Ramdas, Dwayne Richard Shirley, Roberto Coccioli
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Publication number: 20230051507Abstract: A semiconductor device package includes a semiconductor die having two largest dimensions that define a major plane, a packaging material enclosing the semiconductor die, a plurality of contacts on a first exterior surface of the semiconductor device package that is parallel to the major plane, the first exterior surface defining a bottom of the semiconductor device package, and a pedestal of semiconductor material above the semiconductor die in a thermally-conductive, electrically non-conductive relationship with the semiconductor die. The semiconductor material of the pedestal may be doped to provide electromagnetic shielding of the semiconductor die.Type: ApplicationFiled: August 12, 2021Publication date: February 16, 2023Inventors: Han Gao, Ershad Ali, Shrinath Ramdas, Dwayne Richard Shirley, Roberto Coccioli
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Patent number: 10043756Abstract: The present invention is directed to integrated circuits and methods thereof. More specifically, embodiments of the present invention provide a local correction for bending communication line pairs. In an IC package, a pair of communication lines is used to provide a physical link for data communication between two or more components. At regions where the pair of communication lines is bent, the inner bend line is extended in length and shaped to match the length of the outer bend line while preserving integrity of its signal propagation characteristics, thereby providing local phase correction. There are other embodiments as well.Type: GrantFiled: October 4, 2016Date of Patent: August 7, 2018Assignee: INPHI CORPORATIONInventor: Mohammed Ershad Ali
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Publication number: 20170026065Abstract: The present invention is directed to integrated circuits and methods thereof. More specifically, embodiments of the present invention provide a local correction for bending communication line pairs. In an IC package, a pair of communication lines is used to provide a physical link for data communication between two or more components. At regions where the pair of communication lines is bent, the inner bend line is extended in length and shaped to match the length of the outer bend line while preserving integrity of its signal propagation characteristics, thereby providing local phase correction. There are other embodiments as well.Type: ApplicationFiled: October 4, 2016Publication date: January 26, 2017Inventor: Mohammed Ershad ALI
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Patent number: 9461677Abstract: The present invention is directed to integrated circuits and methods thereof. More specifically, embodiments of the present invention provide a local correction for bending communication line pairs. In an IC package, a pair of communication lines is used to provide a physical link for data communication between two or more components. At regions where the pair of communication lines is bent, the inner bend line is extended in length and shaped to match the length of the outer bend line while preserving integrity of its signal propagation characteristics, thereby providing local phase correction. There are other embodiments as well.Type: GrantFiled: January 8, 2015Date of Patent: October 4, 2016Assignee: INPHI CORPORATIONInventor: Mohammed Ershad Ali
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Patent number: 9061500Abstract: A method of manufacturing a printhead substrate, including forming a metal pattern, including a portion forming a pair of electrodes, on an insulating member, forming a conductive film which covers the insulating member and the metal pattern, including a first portion forming a temperature detection element and a second portion except for the first portion, etching the second portion so as to form the pair of electrodes, and etching the first portion so as to form the temperature detection element which is connected to the pair of electrodes, wherein an etching amount in the etching the second portion is larger than a thickness of the conductive film, and an etching amount in the etching the first portion is smaller than the etching amount in the etching the second portion.Type: GrantFiled: October 7, 2014Date of Patent: June 23, 2015Assignee: Canon Kabushiki KaishaInventors: Ershad Ali Chowdhury, Takayuki Kimura, Kenji Makino
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Publication number: 20150109370Abstract: A method of manufacturing a printhead substrate, including forming a metal pattern, including a portion forming a pair of electrodes, on an insulating member, forming a conductive film which covers the insulating member and the metal pattern, including a first portion forming a temperature detection element and a second portion except for the first portion, etching the second portion so as to form the pair of electrodes, and etching the first portion so as to form the temperature detection element which is connected to the pair of electrodes, wherein an etching amount in the etching the second portion is larger than a thickness of the conductive film, and an etching amount in the etching the first portion is smaller than the etching amount in the etching the second portion.Type: ApplicationFiled: October 7, 2014Publication date: April 23, 2015Inventors: Ershad Ali Chowdhury, Takayuki Kimura, Kenji Makino
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Patent number: 8963656Abstract: Described herein are an apparatus, system, and method having a compact symmetrical transition structure for RF applications. The apparatus comprises: first and second ground planes each of which having respective truncated edges, the first and second ground planes being parallel to one another and separated by a multi-layer substrate; a strip line positioned between the first and second ground planes; and a symmetrical transition structure, coupled to the strip line and the first and second ground planes near their respective truncated edges, and further coupled to a broadside coupled line (BCL).Type: GrantFiled: May 23, 2011Date of Patent: February 24, 2015Assignee: Silicon Image, Inc.Inventor: Mohammed Ershad Ali
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Publication number: 20110285474Abstract: Described herein are an apparatus, system, and method having a compact symmetrical transition structure for RF applications. The apparatus comprises: first and second ground planes each of which having respective truncated edges, the first and second ground planes being parallel to one another and separated by a multi-layer substrate; a strip line positioned between the first and second ground planes; and a symmetrical transition structure, coupled to the strip line and the first and second ground planes near their respective truncated edges, and further coupled to a broadside coupled line (BCL).Type: ApplicationFiled: May 23, 2011Publication date: November 24, 2011Inventor: Mohammed Ershad Ali
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Patent number: 7675465Abstract: An integrated circuit (IC) package is disclosed. The IC package includes a substrate having top, middle and bottom layers, an array of millimeter-wave antennas embedded on the top layer of the substrate and a monolithic microwave integrated circuit (MMIC) mounted on the bottom layer of the substrate. In one embodiment, the second level interconnect for surface-mounting on a printed circuit board (PCB) is provided on the bottom layer of the substrate.Type: GrantFiled: May 22, 2007Date of Patent: March 9, 2010Assignee: Sibeam, Inc.Inventors: Chinh Huy Doan, Mohammed Ershad Ali
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Patent number: 7508823Abstract: A high-speed multiple channel and line selector switch allows the simultaneous selection of the two lines of a differential channel and permits the simultaneous selection of multiple channels by introduction of the appropriate high speed pad connectivity.Type: GrantFiled: April 30, 2004Date of Patent: March 24, 2009Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.Inventor: Mohammed Ershad Ali
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Publication number: 20080291115Abstract: An integrated circuit (IC) package is disclosed. The IC package includes a substrate having top, middle and bottom layers, an array of millimeter-wave antennas embedded on the top layer of the substrate and a monolithic microwave integrated circuit (MMIC) mounted on the bottom layer of the substrate. In one embodiment, the second level interconnect for surface-mounting on a printed circuit board (PCB) is provided on the bottom layer of the substrate.Type: ApplicationFiled: May 22, 2007Publication date: November 27, 2008Inventors: Chinh Huy Doan, Mohammed Ershad Ali
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Publication number: 20080290959Abstract: A millimeter-wave integrated circuit (IC) package is disclosed. The package includes a substrate having a plurality of layers and a vertical interconnection. The vertical interconnection comprises a shielded transition between the plurality of layers and a compensation structure to minimize the parasitic effect of the transition.Type: ApplicationFiled: May 22, 2007Publication date: November 27, 2008Inventors: Mohammed Ershad Ali, Rokhsareh Zarnaghi, Chinh Huy Doan
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Patent number: 7270398Abstract: A circuit board for a liquid discharging apparatus in which coating performance of a protective layer and a cavitation resistive film on a heat generating element is excellent and durability is excellent and a manufacturing method of such a circuit board are provided. A surface portion of a wiring material layer is processed so that an etching speed of the surface portion is made higher than that of the material forming the wiring material layer. It is desirable to execute a process for forming at least one selected from a fluoride, a chloride, and a nitride of the material forming the wiring material layer into the surface portion of the wiring material layer.Type: GrantFiled: October 21, 2004Date of Patent: September 18, 2007Assignee: Canon Kabushiki KaishaInventors: Keiichi Sasaki, Masato Kamiichi, Ershad Ali Chowdhury, Yukihiro Hayakawa
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Patent number: 7244370Abstract: In order to provide a circuit substrate with a satisfactory step coverage by the protective layer and the anti-cavitation film in an edge portion of wirings and a liquid discharge head utilizing such circuit substrate, the invention provides a method for producing a circuit substrate provided, on an insulating surface of a substrate, with a plurality of elements each including a resistive layer and a pair of electrodes formed with a predetermined spacing on said resistive layer, including a step of forming an aluminum electrode wiring layer on the resistive layer, a step of isolating the electrode wiring layer by dry etching into each element, and a step of forming the electrode wiring into a tapered cross section with an etching solution containing phosphoric acid, nitric acid and a chelating agent capable of forming a complex with the wiring metal.Type: GrantFiled: August 4, 2004Date of Patent: July 17, 2007Assignee: Canon Kabushiki KaishaInventors: Keiichi Sasaki, Masato Kamiichi, Yukihiro Hayakawa, Ershad Ali Chowdhury
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Patent number: 7223924Abstract: A flexible circuit having vias disposed to minimize discontinuity in a ground plane separating opposing transmission lines. The flex circuit comprises a first transmission line coupled to a first surface, a second transmission line coupled to a second opposing surface and a ground plane separating the first transmission line and the second transmission line. The flexible circuit also includes a first type of electrical connection pads disposed on the first surface, and electrically coupled to the first transmission line. The flexible circuit also includes a second type of electrical connection pads disposed on the second surface, and electrically coupled to the second transmission line wherein the second type of electrical connection pads have a higher areal density than the first type of electrical connection pads.Type: GrantFiled: September 23, 2003Date of Patent: May 29, 2007Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.Inventors: Steven Rosenau, Mohammed Ershad Ali, Jonathan Simon, Brian Lemoff, Lisa Anne Windover
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Patent number: 7065113Abstract: A driver IC and EML array are electrically coupled to one another via a flexible PCB. Thermal isolation between the driver IC and EML array is adjusted by varying a cross-section and length of electrically-conductive traces on the PCB.Type: GrantFiled: April 30, 2002Date of Patent: June 20, 2006Inventors: Mohammed Ershad Ali, Edwin De Groot, Brian Elliot Lemoff, Lisa Anne Buckman
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Patent number: 6933628Abstract: An embodiment in accordance with the invention recites a high speed channel selector switch. The high speed channel selector switch includes a first unit that has a plurality of contacts that are operable to electrically couple to a plurality of high speed data lines of a device under test. The first unit also has an additional contact operable to electrically couple to a signal line. The high speed channel selector switch further includes a second unit that is operable to selectively electrically couple one of the plurality of contacts of the first unit to the additional contact of the first unit. The second unit also electrically couples the remaining contacts of the first unit to respective termination impedances. Thus, one of the plurality of high speed data lines is coupled to the signal line via the second unit and the remaining high speed data lines are coupled to respective termination impedances.Type: GrantFiled: July 24, 2003Date of Patent: August 23, 2005Assignee: Agilent Technologies, Inc.Inventor: Mohammed Ershad Ali
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Patent number: 6838351Abstract: A circuit board for a liquid discharging apparatus in which coating performance of a protective layer and a cavitation resistive film on a heat generating element is excellent and durability is excellent and a manufacturing method of such a circuit board are provided. A surface portion of a wiring material layer is processed so that an etching speed of the surface portion is made higher than that of the material forming the wiring material layer. It is desirable to execute a process for forming at least one selected from a fluoride, a chloride, and a nitride of the material forming the wiring material layer into the surface portion of the wiring material layer.Type: GrantFiled: March 22, 2004Date of Patent: January 4, 2005Assignee: Canon Kabushiki KaishaInventors: Keiichi Sasaki, Masato Kamiichi, Ershad Ali Chowdhury, Yukihiro Hayakawa
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Publication number: 20040191982Abstract: A circuit board for a liquid discharging apparatus in which coating performance of a protective layer and a cavitation resistive film on a heat generating element is excellent and durability is excellent and a manufacturing method of such a circuit board are provided. A surface portion of a wiring material layer is processed so that an etching speed of the surface portion is made higher than that of the material forming the wiring material layer. It is desirable to execute a process for forming at least one selected from a fluoride, a chloride, and a nitride of the material forming the wiring material layer into the surface portion of the wiring material layer.Type: ApplicationFiled: March 22, 2004Publication date: September 30, 2004Applicant: CANON KABUSHIKI KAISHAInventors: Keiichi Sasaki, Masato Kamiichi, Ershad Ali Chowdhury, Yukihiro Hayakawa