Abstract: Pseudo-random sequences (PRS) are used for measuring bit error structures in digital transmission paths, into which sequences labels in the form of test error sequences are inserted at a defined site in the pattern. Often it is not possible to mark the measured data at the sender's end, if, for example, the PRS measuring devices do not allow a label fade-in at the sender's end in end-to-end measurements in international data exchange. The invention provides a means for subsequently providing PRS labels. In a method for measuring bit error structures of a digital transmission channel of a digital transmission link, a marking of transmitted quasirandom sequences takes place at the receiving end. The marker is switched on at the receiver's end before a bit-by-bit comparator and the quasirandom sequence marking is synchronized with the quasirandom sequence signal received from the sender's end.

Abstract: Described are a measuring method and a measuring tool for data communications networks which make use of asynchronous transfer mode (ATM). At the receiving-side 19.44 Mbit/s parallel port of ATM transmission devices, ATM cells are present, which are composed, for example, of 53 eight-bit width data words, whose 47 useful signal words (payload) originate from originally synchronous digital data strings, whose frequency is determined by the bit rate of the originally synchronous digital data strings, and which permit the cell-by-cell reading out of the payload data, which are fed consecutively and at a higher rate as burst data to a data test receiver, which can ascertain the correct or corrupted receipt of the transmitting-side data, without the need for a timing recovery circuit on the receiving side, so that the measurements can be performed using a constant bit rate and a variable bit rate of the originally synchronous digital data strings.

Abstract: For imitating periodic signals occurring in digital transmission systems during some operating conditions in view of the multiplex structure a word generator is proposed which includes a read-only memory from which during a test signal cycle only 4116 permutations are successively read out of a total of 65,536 possible word sizes and permutations of e.g. a 16-bit word. The remaining 61,420 permutations are generated by shifting bit-by-bit the entire packet of continuous signals so that in case of a fixed 16 bit pattern the packet starts at a different bit position during each successive cycle and after 16 cycles all 16 bit positions occur as begin state. The shift is caused by a framing bit sequence which determines the test signal cycle and whose length is aliquant to n=16.