Patents by Inventor Erwin Orejola

Erwin Orejola has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11908823
    Abstract: A packaged semiconductor device includes a first bond pad, a second bond pad, a first bond wire that includes a first end bonded to the first bond pad and a second end bonded to the second bond pad, and a second bond wire that includes a first end that is electrically connected to the first bond pad and a second end that is electrically connected to the second bond pad. The first end of the second bond wire is bonded to the first end of the first bond wire. A method of bonding a bond wire includes bonding a first end of a first bond wire to a contact surface of a first bond pad and bonding a first end of a second bond wire to a surface of the first end of the first bond wire.
    Type: Grant
    Filed: January 11, 2021
    Date of Patent: February 20, 2024
    Assignee: Wolfspeed, Inc.
    Inventors: Erwin Orejola, Brian Condie, Ulf Andre
  • Publication number: 20220223559
    Abstract: A packaged semiconductor device includes a first bond pad, a second bond pad, a first bond wire that includes a first end bonded to the first bond pad and a second end bonded to the second bond pad, and a second bond wire that includes a first end that is electrically connected to the first bond pad and a second end that is electrically connected to the second bond pad. The first end of the second bond wire is bonded to the first end of the first bond wire. A method of bonding a bond wire includes bonding a first end of a first bond wire to a contact surface of a first bond pad and bonding a first end of a second bond wire to a surface of the first end of the first bond wire.
    Type: Application
    Filed: January 11, 2021
    Publication date: July 14, 2022
    Inventors: Erwin Orejola, Brian Condie, Ulf Andre
  • Patent number: 9373577
    Abstract: A semiconductor package includes a substrate, an RF semiconductor die attached to a first side of the substrate, a capacitor attached to the first side of the substrate, and a first terminal on the first side of the substrate. The semiconductor package further includes copper or aluminum bonding wires or ribbons connecting the first terminal to an output of the RF semiconductor die, and gold bonding wires or ribbons connecting the capacitor to the output of the RF semiconductor die. The gold bonding wires or ribbons are designed to accommodate greater RF Joule heating during operation of the RF semiconductor die than the copper or aluminum bonding wires or ribbons. Corresponding methods of manufacturing are also described.
    Type: Grant
    Filed: May 21, 2013
    Date of Patent: June 21, 2016
    Assignee: Infineon Technologies AG
    Inventors: Alexander Komposch, Brian William Condie, Erwin Orejola, Michael Real
  • Publication number: 20140346637
    Abstract: A semiconductor package includes a substrate, an RF semiconductor die attached to a first side of the substrate, a capacitor attached to the first side of the substrate, and a first terminal on the first side of the substrate. The semiconductor package further includes copper or aluminum bonding wires or ribbons connecting the first terminal to an output of the RF semiconductor die, and gold bonding wires or ribbons connecting the capacitor to the output of the RF semiconductor die. The gold bonding wires or ribbons are designed to accommodate greater RF Joule heating during operation of the RF semiconductor die than the copper or aluminum bonding wires or ribbons. Corresponding methods of manufacturing are also described.
    Type: Application
    Filed: May 21, 2013
    Publication date: November 27, 2014
    Inventors: Alexander Komposch, Brian William Condie, Erwin Orejola, Michael Real
  • Publication number: 20100181675
    Abstract: A semiconductor package with wedge bonded chip. One embodiment provides a semiconductor chip, a wire bond and a metal element. The chip includes a bond pad with a copper layer. The wire bond is wedge bonded to the bond pad and ball bonded to the metal element.
    Type: Application
    Filed: January 16, 2009
    Publication date: July 22, 2010
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Dexter Reynoso, Erwin Orejola