Patents by Inventor Erwin R. Estepa

Erwin R. Estepa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6969638
    Abstract: Disclosed herein is a process for assembling an integrated circuit, as well as the assembly resulting from the process, employing a surface treatment of bondpad surfaces. In one aspect, a method of assembling an integrated circuit includes providing a substrate having electrical terminals on a first side of the substrate and a bondpad on a second side of the substrate opposing the first side. In this embodiment, the bondpad is electrically coupled to at least one of the terminals on the first side. In addition, the method includes mounting an integrated circuit chip to the first side of the substrate, where the integrated circuit component has a lead adapted to be wire-bonded to the terminal. The method further includes removing oxidation from the bondpad, where the bondpad is adapted to be metallurgically bonded to a trace on a printed circuit board. Moreover, this embodiment of the method includes metallurgically bonding the bondpad to the trace.
    Type: Grant
    Filed: October 2, 2003
    Date of Patent: November 29, 2005
    Assignee: Texas Instruments Incorporated
    Inventors: Erwin R. Estepa, Joel T. Medina, Maria Alesssandra Azurin, Kazuaki Ano
  • Publication number: 20020030261
    Abstract: A semiconductor assembly comprising first and second chips, each having an active surface including an integrated circuit and a plurality of input/output contact pads; an interposer of electrically insulating material having a plurality of electrically conductive paths extending through said interposer from the first surface to the second surface, forming electrical terminals on each of said surfaces; said interposer being disposed between said active surfaces of said first and second chips; connections between each of said contact pads of said first chip to selected terminals on said first interposer surface, respectively, and between each of said contact pads of said second chip to selected terminals on said second interposer surface, respectively; and said interposer further having electrical terminals for interconnecting said chips to other parts.
    Type: Application
    Filed: December 18, 2000
    Publication date: March 14, 2002
    Inventors: Ruben A. Rolda, Erwin R. Estepa, Lani Guimbaolibot