Patents by Inventor Esha Choukse

Esha Choukse has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230409393
    Abstract: A method of autoscaling in a datacenter includes receiving one or more datacenter metrics at a control service, comparing the one or more datacenter metrics to a threshold value, selecting at least one component of a server computer to scale-up, and sending an instruction to the server computer to scale-up the at least one component.
    Type: Application
    Filed: May 24, 2022
    Publication date: December 21, 2023
    Inventors: Pulkit Ambikanandan MISRA, Esha CHOUKSE, Ioannis MANOUSAKIS, Inigo GOIRI PRESA, Ricardo GouvĂȘa BIANCHINI
  • Patent number: 11216386
    Abstract: Techniques for setting a 2-level auto-close timer to access a memory device include examples of setting first and second time values for the 2-level auto-close timer to cause accessed rows to auto-close following a cache line access to a row of a bank of memory devices. For these examples, the cache line access is responsive to a multi-channel address interleaving policy that causes either successive or non-successive cache line accesses to the bank of memory devices.
    Type: Grant
    Filed: September 26, 2019
    Date of Patent: January 4, 2022
    Assignee: Intel Corporation
    Inventors: Vivek Kozhikkottu, Suresh Chittor, Esha Choukse, Shankar Ganesh Ramasubramanian
  • Patent number: 10936507
    Abstract: In one embodiment, an apparatus includes: a page table circuit to receive a virtual address and to generate at least a portion of a physical address therefrom; and a mapping rule table coupled to the page table circuit, the mapping rule table to receive mapping metadata of a page of a system memory and, based on the mapping metadata, output a mapping rule for the page. Other embodiments are described and claimed.
    Type: Grant
    Filed: March 28, 2019
    Date of Patent: March 2, 2021
    Assignee: Intel Corporation
    Inventors: Vivek Kozhikkottu, Esha Choukse, Shankar Ganesh Ramasubramanian, Melin Dadual, Suresh Chittor
  • Publication number: 20200310979
    Abstract: In one embodiment, an apparatus includes: a page table circuit to receive a virtual address and to generate at least a portion of a physical address therefrom; and a mapping rule table coupled to the page table circuit, the mapping rule table to receive mapping metadata of a page of a system memory and, based on the mapping metadata, output a mapping rule for the page. Other embodiments are described and claimed.
    Type: Application
    Filed: March 28, 2019
    Publication date: October 1, 2020
    Inventors: Vivek Kozhikkottu, Esha Choukse, Shankar Ganesh Ramasubramanian, Melin Dadual, Suresh Chittor
  • Publication number: 20200019513
    Abstract: Techniques for setting a 2-level auto-close timer to access a memory device include examples of setting first and second time values for the 2-level auto-close timer to cause accessed rows to auto-close following a cache line access to a row of a bank of memory devices. For these examples, the cache line access is responsive to a multi-channel address interleaving policy that causes either successive or non-successive cache line accesses to the bank of memory devices.
    Type: Application
    Filed: September 26, 2019
    Publication date: January 16, 2020
    Inventors: Vivek KOZHIKKOTTU, Suresh CHITTOR, Esha CHOUKSE, Shankar Ganesh RAMASUBRAMANIAN
  • Publication number: 20140173187
    Abstract: Methods, systems and devices are provided for revising a data image of a read-write memory device. The method includes accessing an initial data image from an initial virtual block corresponding to an actual block of a series of actual blocks of the read-write memory device. The initial data image includes an initial boot loader. Also, a backup data image is stored in a remote virtual block spaced away and following in the series of actual blocks from the initial virtual block. The backup data image includes a backup boot loader. Additionally, the initial data image is erased from the initial virtual block and a replacement data image is stored in the initial virtual block. The initial virtual block may include more than one virtual block spaced away and proceeding in the series of actual blocks from the remote virtual block.
    Type: Application
    Filed: October 23, 2013
    Publication date: June 19, 2014
    Applicant: Qualcomm Incorporated
    Inventors: Dhamim Packer Ali, Taara Nandakishore Ellala, Esha Choukse, Ashutosh Shrivastava, William Edward Kimberly, Richard Patrick