Patents by Inventor Ethan Mirsky

Ethan Mirsky has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20030182346
    Abstract: A method and an apparatus for configuring arbitrary sized data paths comprising multiple context processing elements (MCPEs) are provided. Multiple MCPEs may be chained to form wider-word data paths of arbitrary widths, wherein a first ALU serves as the most significant byte (MSB) of the data path while a second ALU serves as the least significant byte (LSB) of the data path. The ALUs of the data path are coupled using a left-going, or forward, carry chain for transmitting at least one carry bit from the LSB ALU to the MSB ALU. The MSB ALU comprises configurable logic for generating at least one signal in response to a carry bit received over the left-going carry chain, the at least one signal comprising a saturation signal and a saturation value. The MCPEs of the data path use configurable logic to manipulate a resident bit sequence in response to the saturation signal transmitted thereby reconfiguring, or changing the operation of, the data path in response to the saturation signal.
    Type: Application
    Filed: February 27, 2003
    Publication date: September 25, 2003
    Applicant: Broadcom Corporation
    Inventor: Ethan A. Mirsky
  • Publication number: 20030163668
    Abstract: A method and apparatus for providing local control of processing elements in a network of multiple context processing elements (MCPEs). A MCPE stores configuration memory contexts and maintains data of a current configuration. State information is received from at least one other MCPE. A configuration control signal is generated in response to the state information and current configuration data. A MCPE is selected in response to the configuration control signal to control the MCPE. Each MCPE in the networked array has an assigned physical and virtual identification. Data comprising control data, configuration data, an address mask, and a destination identification is transmitted to a MCPE. The transmitted address mask is applied to either a physical or a virtual identification, and to a destination identification. The masked physical or virtual identification is compared to the masked destination identification.
    Type: Application
    Filed: February 27, 2003
    Publication date: August 28, 2003
    Inventors: Ethan Mirsky, Robert French, Ian Eslick
  • Patent number: 6591357
    Abstract: A method and an apparatus for configuring arbitrary sized data paths comprising multiple context processing elements (MCPEs) are provided. Multiple MCPEs may be chained to form wider-word data paths of arbitrary widths, wherein a first ALU serves as the most significant byte (MSB) of the data path while a second ALU serves as the least significant byte (LSB) of the data path. The ALUs of the data path are coupled using a left-going, or forward, carry chain for transmitting at least one carry bit from the LSB ALU to the MSB ALU. The MSB ALU comprises configurable logic for generating at least one signal in response to a carry bit received over the left-going carry chain, the at least one signal comprising a saturation signal and a saturation value. The MCPEs of the data path use configurable logic to manipulate a resident bit sequence in response to the saturation signal transmitted thereby reconfiguring, or changing the operation of, the data path in response to he saturation signal.
    Type: Grant
    Filed: February 26, 2001
    Date of Patent: July 8, 2003
    Assignee: Broadcom Corporation
    Inventor: Ethan A. Mirsky
  • Publication number: 20030126403
    Abstract: A method and an apparatus for retiming in a network of multiple context processing elements in a network of multiple context processing elements are provided. A programmable delay element is configured to programmably delay signals between a number of multiple context processing elements of an array without requiring a multiple context processing element to implement the delay. The output of a first multiple context processing element is coupled to a first multiplexer and to the input of a number of serially connected delay registers. The output of each of the serially connected registers is coupled to the input of a second multiplexer. The output of the second multiplexer is coupled to the input of the first multiplexer, and the output of the first multiplexer is coupled to a second multiple context processing element. The first and second multiplexers are provided with at least one set of data representative of at least one configuration memory context of a multiple context processing element.
    Type: Application
    Filed: December 16, 2002
    Publication date: July 3, 2003
    Applicant: Broadcom Corporation
    Inventors: Ethan Mirsky, Robert French, Ian Eslick
  • Patent number: 6553479
    Abstract: A method and apparatus for providing local control of processing elements in a network of multiple context processing element are provided. A multiple context processing element is configured to store a number of configuration memory contexts. This multiple context processing element maintains data of a current configuration. State information is received from at least one other multiple context processing element. At least one configuration control signal is generated in responses to the state information and the data of a current configuration. One of multiple configuration memory contexts is selected in response to the configuration control signal, the selected configuration memory context controlling the multiple context processing element. Each multiple context processing element in the networked array of multiple context processing elements has an assigned physical and virtual identification.
    Type: Grant
    Filed: July 31, 2002
    Date of Patent: April 22, 2003
    Assignee: Broadcom Corporation
    Inventors: Ethan Mirsky, Robert French, Ian Eslick
  • Patent number: 6526498
    Abstract: A method and an apparatus for retiming in a network of multiple context processing elements are provided. A programmable delay element is configured to programmably delay signals between a number of multiple context processing elements of an array without requiring a multiple context processing element to implement the delay. The output of a first multiple context processing element is coupled to a first multiplexer and to the input of a number of serially connected delay registers. The output of each of the serially connected delay registers is coupled to the input of a second multiplexer. The output of the second multiplexer is coupled to the input of the first multiplexer, and the output of the first multiplexer is coupled to a second multiple context processing element. The first and second multiplexers are provided with at least one set of data representative of at least one configuration memory context of a multiple context processing element.
    Type: Grant
    Filed: February 15, 2000
    Date of Patent: February 25, 2003
    Assignee: Broadcom Corporation
    Inventors: Ethan Mirsky, Robert French, Ian Eslick
  • Patent number: 6496918
    Abstract: A programmable integrated circuit utilizes a large number of intermediate-grain processing elements which are multibit processing units arranged in a configurable mesh. The coarse-grain resources, such as memory and processing, are deployable in a way that takes advantage of the opportunities for optimization present in given problems. To accomplish this, the interconnect supports three different modes of operation: a static value in which a value set by the configuration data is provided to a functional unit, static source in which another functional unit serves as the value source, and a dynamic source mode in which the source is determined by the value from another functional unit.
    Type: Grant
    Filed: June 27, 2001
    Date of Patent: December 17, 2002
    Assignee: Massachusetts Institute of Technology
    Inventors: André DeHon, Ethan Mirsky, Thomas F. Knight, Jr.
  • Publication number: 20020188832
    Abstract: A method and apparatus for providing local control of processing elements in a network of multiple context processing element are provided. A multiple context processing element is configured to store a number of configuration memory contexts. This multiple context processing element maintains data of a current configuration. State information is received from at least one other multiple context processing element. At least one configuration control signal is generated in responses to the state information and the data of a current configuration. One of multiple configuration memory contexts is selected in response to the configuration control signal, the selected configuration memory context controlling the multiple context processing element. Each multiple context processing element in the networked array of multiple context processing elements has an assigned physical and virtual identification.
    Type: Application
    Filed: July 31, 2002
    Publication date: December 12, 2002
    Applicant: Broadcom Corporation
    Inventors: Ethan Mirsky, Robert French, Ian Eslick
  • Patent number: 6457116
    Abstract: A method and apparatus for providing local control of processing elements in a network of multiple context processing element are provided. A multiple context processing element is configured to store a number of configuration memory contexts. This multiple context processing element maintains data of a current configuration. State information is received from at least one other multiple context processing element. At least one configuration control signal is generated in response to the state information and the data of a current configuration. One of multiple configuration memory contexts is selected in response to the configuration control signal, the selected configuration memory context controlling the multiple context processing element. Each multiple context processing element in the networked array of multiple context processing elements has an assigned physical and virtual identification.
    Type: Grant
    Filed: May 28, 1999
    Date of Patent: September 24, 2002
    Assignee: Broadcom Corporation
    Inventors: Ethan Mirsky, Robert French, Ian Eslick
  • Publication number: 20020087846
    Abstract: A reconfigurable processing system executes instructions and configurations in parallel. Initially, a first instruction loads configurations into configuration registers. The configuration field of a subsequently fetched instruction selects a configuration register. The instruction controls and controls of the configuration in the selected configuration register are decoded and modified as specified by the instruction. The controls provide data operands to the execution units which process the operands and generate results. Scalar data, vector data, or a combination of scalar and vector data can be processed. The processing is controlled by instructions executed in parallel with configurations invoked by configuration fields within the instructions. Vectors are processed using a vector register file which stores vectors. A vector address unit identifies addresses of vector elements in the vector register file to be processed.
    Type: Application
    Filed: November 2, 2001
    Publication date: July 4, 2002
    Inventors: John R. Nickolls, Scott D. Johnson, Mark Williams, Ethan Mirsky, Kambdur Kirthiranjan, Amrit Raj Pant, Lawrence J. Madar
  • Publication number: 20020056032
    Abstract: A memory management system provides the ability for multiple requesters to access blocks of memory in a pipelined manner. During a first clock, requests for one or more of the memory blocks are received by the system. A determination is made of whether one of the memory blocks is requested by one or more requests. If the same memory block is requested by two or more requests, the system performs a further determination of which of the requests will be provided to the memory block. The determined request is provided to the memory block on the first clock. During a second clock, the data of the determined request is latched to the memory block and a memory access is initiated. If the request is a write request, the data is written to the memory block. If the request is a read request, then the requested data is retrieved and, on a third clock, the data is driven onto a bus, routed to the determined requester, and available to be latched into the requester on the fourth clock.
    Type: Application
    Filed: November 2, 2001
    Publication date: May 9, 2002
    Inventors: Lawrence J. Madar, John R. Nickolls, Ethan Mirsky
  • Publication number: 20010029515
    Abstract: A method and an apparatus for configuring arbitrary sized data paths comprising multiple context processing elements (MCPEs) are provided. Multiple MCPEs may be chained to form wider-word data paths of arbitrary widths, wherein a first ALU serves as the most significant byte (MSB) of the data path while a second ALU serves as the least significant byte (LSB) of the data path. The ALUs of the data path are coupled using a left-going, or forward, carry chain for transmitting at least one carry bit from the LSB ALU to the MSB ALU. The MSB ALU comprises configurable logic for generating at least one signal in response to a carry bit received over the left-going carry chain, the at least one signal comprising a saturation signal and a saturation value. The saturation signal is generated using logic that tests for saturation in the data path. The ALUs of the data path are further coupled using a right-going carry chain for transmitting the saturation signal back down the data path.
    Type: Application
    Filed: February 26, 2001
    Publication date: October 11, 2001
    Inventor: Ethan A. Mirsky
  • Patent number: 6266760
    Abstract: A programmable integrated circuit utilizes a large number of intermediate-grain processing elements which are multibit processing units arranged in a configurable mesh. The coarse-grain resources, such as memory and processing, are deployable in a way that takes advantage of the opportunities for optimization present in given problems. To accomplish this, the interconnect supports three different modes of operation: a static value in which a value set by the configuration data is provided to a functional unit, static source in which another functional unit serves as the value source, and a dynamic source mode in which the source is determined by the value from another functional unit.
    Type: Grant
    Filed: April 15, 1999
    Date of Patent: July 24, 2001
    Assignee: Massachusetts Institute of Technology
    Inventors: André DeHon, Ethan Mirsky, Thomas F. Knight, Jr.
  • Patent number: 6226735
    Abstract: A method and an apparatus for configuring arbitrary sized data paths comprising multiple context processing elements (MCPEs) are provided. Multiple MCPEs may be chained to form wider-word data paths of arbitrary widths. The ALUs of the data path are coupled using a carry chain for transmitting at least one carry bit from the LSB ALU to the MSB ALU. The MSB ALU comprises configurable logic for generating a signal in response to a carry bit received over the carry chain, the signal comprises a saturation signal and a saturation value. The saturation signal is generated using logic that tests for saturation in the data path. The ALUs of the data path are further coupled using a right-going carry chain for transmitting the saturation signal back down the data path. The saturation signal is transmitted from the MSB ALU through the ALUs of the data path to the LSB ALU using a first back propagation channel.
    Type: Grant
    Filed: May 8, 1998
    Date of Patent: May 1, 2001
    Assignee: Broadcom
    Inventor: Ethan A. Mirsky
  • Patent number: 6122719
    Abstract: A method and an apparatus for retiming in a network of multiple context processing elements are provided. A programmable delay element is configured to programmably delay signals between a number of multiple context processing elements of an array without requiring a multiple context processing element to implement the delay. The output of a first multiple context processing element is coupled to a first multiplexer and to the input of a number of serially connected delay registers. The output of each of the serially connected delay registers is coupled to the input of a second multiplexer. The output of the second multiplexer is coupled to the input of the first multiplexer, and the output of the first multiplexer is coupled to a second multiple context processing element. The first and second multiplexers are provided with at least one set of data representative of at least one configuration memory context of a multiple context processing element.
    Type: Grant
    Filed: October 31, 1997
    Date of Patent: September 19, 2000
    Assignee: Silicon Spice
    Inventors: Ethan Mirsky, Robert French, Ian Eslick
  • Patent number: 6108760
    Abstract: A method and an apparatus for position independent reconfiguration in a network of multiple context processing elements are provided. Wach multiple context processing element in a networked array of multiple context processing elements has an assigned physical identification. Virtual identifications may also be assigned to a number of the multiple context processing elements. Data is transmitted to at least one of the multiple context processing elements of the array, the data comprising control data, configuration data, an address mask, and a destination identification. The transmitted address mask is applied to either the physical or virtual identification and to a destination identification. The masked physical or virtual identification is compared to the masked destination identification.
    Type: Grant
    Filed: October 31, 1997
    Date of Patent: August 22, 2000
    Assignee: Silicon Spice
    Inventors: Ethan Mirsky, Robert French, Ian Eslick
  • Patent number: 5956518
    Abstract: A programmable integrated circuit utilizes a large number of intermediate-grain processing elements which are multibit processing units arranged in a configurable mesh. The coarse-grain resources, such as memory and processing, are deployable in a way that takes advantage of the opportunities for optimization present in given problems. To accomplish this, the interconnect supports three different modes of operation: a static value in which a value set by the configuration data is provided to a functional unit, static source in which another functional unit serves as the value source, and a dynamic source mode in which the source is determined by the value from another functional unit.
    Type: Grant
    Filed: April 11, 1996
    Date of Patent: September 21, 1999
    Assignee: Massachusetts Institute of Technology
    Inventors: Andre DeHon, Ethan Mirsky, Thomas F. Knight, Jr.
  • Patent number: 5915123
    Abstract: A method and apparatus for providing local control of processing elements in a network of multiple context processing element are provided. A multiple context processing element is configured to store a number of configuration memory contexts. This multiple context processing element maintains data of a current configuration. State information is received from at least one other multiple context processing element. At least one configuration control signal is generated in response to the state information and the data of a current configuration. One of multiple configuration memory contexts is selected in response to the configuration control signal, the selected configuration memory context controlling the multiple context processing element. Each multiple context processing element in the networked array of multiple context processing elements has an assigned physical and virtual identification.
    Type: Grant
    Filed: October 31, 1997
    Date of Patent: June 22, 1999
    Assignee: Silicon Spice
    Inventors: Ethan Mirsky, Robert French, Ian Eslick