Patents by Inventor Ethan Tseng

Ethan Tseng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240334034
    Abstract: Metasurfaces and systems including metasurfaces for imaging and methods of imaging are described. In one embodiment, a method for acquiring images by an imaging system comprising a metalens includes: illuminating the metalens; acquiring light passing through the metalens as a first image by an image sensor; and processing the first image into a second image that is a deconvolved version of the first image by a post-processing engine. The metalens includes a plurality of nanoposts carried by a substrate.
    Type: Application
    Filed: February 4, 2022
    Publication date: October 3, 2024
    Applicants: UNIVERSITY OF WASHINGTON, THE TRUSTEES OF PRINCETON UNIVERSITY
    Inventors: Arka Majumdar, Shane Colburn, James Whitehead, Luocheng Huang, Ethan Tseng, Seung-Hwan Baek, Felix Heide
  • Publication number: 20240202989
    Abstract: Digital content stylization techniques are described that leverage a neural photofinisher to generate stylized digital images. In one example, the neural photofinisher is implemented as part of a stylization system to train a neural network to perform digital image style transfer operations using reference digital content as training data. The training includes calculating a style loss term that identifies a particular visual style of the reference digital content. Once trained, the stylization system receives a digital image and generates a feature map of a scene depicted by the digital image. Based on the feature map as well as the style loss, the stylization system determines visual parameter values to apply to the digital image to incorporate a visual appearance of the particular visual style. The stylization system generates the stylized digital image by applying the visual parameter values to the digital image automatically and without user intervention.
    Type: Application
    Filed: December 19, 2022
    Publication date: June 20, 2024
    Applicant: Adobe Inc.
    Inventors: Ethan Tseng, Zhihao Xia, Yifei Fan, Xuaner Zhang, Peter Merrill, Lars Jebe, Jiawen Chen
  • Publication number: 20230386913
    Abstract: A semiconductor device includes a substrate, two semiconductor fins protruding from the substrate, an epitaxial feature over the two semiconductor fins and connected to the two semiconductor fins, a silicide layer over the epitaxial feature, a barrier layer over the silicide layer, and a metal layer over the barrier layer. The barrier layer includes a metal nitride. Along a boundary between the barrier layer and the metal layer, an atomic ratio of oxygen to metal nitride is about 0.15 to about 1.0.
    Type: Application
    Filed: July 28, 2023
    Publication date: November 30, 2023
    Inventors: Cheng-Wei Chang, Yu-Ming Huang, Ethan Tseng, Ken-Yu Chang, Yi-Ying Liu
  • Patent number: 11742240
    Abstract: A semiconductor device includes a substrate, two semiconductor fins protruding from the substrate, an epitaxial feature over the two semiconductor fins and connected to the two semiconductor fins, a silicide layer over the epitaxial feature, a barrier layer over the silicide layer, and a metal layer over the barrier layer. The barrier layer includes a metal nitride. Along a boundary between the barrier layer and the metal layer, an atomic ratio of oxygen to metal nitride is about 0.15 to about 1.0.
    Type: Grant
    Filed: February 21, 2022
    Date of Patent: August 29, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Cheng-Wei Chang, Yu-Ming Huang, Ethan Tseng, Ken-Yu Chang, Yi-Ying Liu
  • Publication number: 20230171385
    Abstract: A method for learned hardware-in-the-loop phase retrieval for holographic near-eye displays includes generating simulated ideal output images of a holographic display. The method further includes capturing real output images of the holographic display. The method further includes learning a mapping between the simulated ideal output images and the real output images. The method further includes using the learned mapping to solve for an aberration compensating hologram phase and using the aberration compensating hologram phase to adjust a phase pattern of a spatial light modulator of the holographic display.
    Type: Application
    Filed: November 29, 2022
    Publication date: June 1, 2023
    Inventors: Praneeth Kumar Chakravarthula, Felix Heide, Ethan Tseng, Tarun Srivastava
  • Publication number: 20220189825
    Abstract: A semiconductor device includes a substrate, two semiconductor fins protruding from the substrate, an epitaxial feature over the two semiconductor fins and connected to the two semiconductor fins, a silicide layer over the epitaxial feature, a barrier layer over the silicide layer, and a metal layer over the barrier layer. The barrier layer includes a metal nitride. Along a boundary between the barrier layer and the metal layer, an atomic ratio of oxygen to metal nitride is about 0.15 to about 1.0.
    Type: Application
    Filed: February 21, 2022
    Publication date: June 16, 2022
    Inventors: Cheng-Wei Chang, Yu-Ming Huang, Ethan Tseng, Ken-Yu Chang, Yi-Ying Liu
  • Patent number: 11257712
    Abstract: A method includes providing a structure that includes a semiconductor substrate, an epitaxial source/drain feature over the semiconductor substrate, and one or more dielectric layers over the epitaxial source/drain feature; etching a hole into the one or more dielectric layer to expose a portion of the epitaxial source/drain feature; forming a silicide layer over the portion of the epitaxial source/drain feature; forming a conductive barrier layer over the silicide layer; and applying a plasma cleaning process to at least the conductive barrier layer, wherein the plasma cleaning process uses a gas mixture including N2 gas and H2 gas and is performed at a temperature that is at least 300° C.
    Type: Grant
    Filed: May 13, 2020
    Date of Patent: February 22, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Cheng-Wei Chang, Yu-Ming Huang, Ethan Tseng, Ken-Yu Chang, Yi-Ying Liu
  • Publication number: 20210358804
    Abstract: A method includes providing a structure that includes a semiconductor substrate, an epitaxial source/drain feature over the semiconductor substrate, and one or more dielectric layers over the epitaxial source/drain feature; etching a hole into the one or more dielectric layer to expose a portion of the epitaxial source/drain feature; forming a silicide layer over the portion of the epitaxial source/drain feature; forming a conductive barrier layer over the silicide layer; and applying a plasma cleaning process to at least the conductive barrier layer, wherein the plasma cleaning process uses a gas mixture including N2 gas and H2 gas and is performed at a temperature that is at least 300° C.
    Type: Application
    Filed: May 13, 2020
    Publication date: November 18, 2021
    Inventors: Cheng-Wei Chang, Yu-Ming Huang, Ethan Tseng, Ken-Yu Chang, Yi-Ying Liu