Patents by Inventor Etienne Jacques
Etienne Jacques has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11196689Abstract: Examples are disclosed that relate to deferring a message based upon a target situation for message presentation. One example provides a computing device including an output subsystem including one or more output devices, an input subsystem including one or more user input devices, and a logic device. The computing device further includes memory storing instructions executable by the logic device to receive a message from a remote computing system, output a notification of the message via the output subsystem, and receive via the input subsystem a request for a deferral of the message, the request for the deferral including an annotation to be stored for a later presentation with the message.Type: GrantFiled: March 20, 2018Date of Patent: December 7, 2021Assignee: Microsoft Technology Licensing, LLCInventors: Ryen William White, Peter Richard Bailey, Mathieu Etienne Jacques Audouin
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Patent number: 10818287Abstract: Aspects of the technology described herein provide an efficient user interface that enables users to respond to tasks quickly by providing automated quick task notifications via an audio channel. An audio channel quick task system includes components for recognizing and extracting quick tasks from content (e.g., interpersonal communications, composed content, line of business (LOB) application documents), and for prioritizing and routing the quick tasks to the user via an audio channel at an appropriate and relevant time. The system is enabled to process a user response, determine an action for handling the quick task, and execute the action on behalf of the user (e.g., pass a reply to a requestor, pass an instruction to an application or service, queue the quick task notification, delegate the quick task to another user or bot, forward the quick task to a companion device, or launch an application on a companion device).Type: GrantFiled: January 22, 2018Date of Patent: October 27, 2020Assignee: Microsoft Technology Licensing, LLCInventors: Ryen William White, Mathieu Etienne Jacques Audouin, Patrick Pantel, Nikrouz Ghotbi, Anantha Deepthi Uppala, Vanessa Graham Murdock, Mark James Encarnacion, Nirupama Chandrasekaran
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Publication number: 20190297040Abstract: Examples are disclosed that relate to deferring a message based upon a target situation for message presentation. One example provides a computing device including an output subsystem including one or more output devices, an input subsystem including one or more user input devices, and a logic device. The computing device further includes memory storing instructions executable by the logic device to receive a message from a remote computing system, output a notification of the message via the output subsystem, and receive via the input subsystem a request for a deferral of the message, the request for the deferral including an annotation to be stored for a later presentation with the message.Type: ApplicationFiled: March 20, 2018Publication date: September 26, 2019Applicant: Microsoft Technology Licensing, LLCInventors: Ryen William WHITE, Peter Richard BAILEY, Mathieu Etienne Jacques AUDOUIN
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Publication number: 20190228766Abstract: Aspects of the technology described herein provide an efficient user interface that enables users to respond to tasks quickly by providing automated quick task notifications via an audio channel. An audio channel quick task system includes components for recognizing and extracting quick tasks from content (e.g., interpersonal communications, composed content, line of business (LOB) application documents), and for prioritizing and routing the quick tasks to the user via an audio channel at an appropriate and relevant time. The system is enabled to process a user response, determine an action for handling the quick task, and execute the action on behalf of the user (e.g., pass a reply to a requestor, pass an instruction to an application or service, queue the quick task notification, delegate the quick task to another user or bot, forward the quick task to a companion device, or launch an application on a companion device).Type: ApplicationFiled: January 22, 2018Publication date: July 25, 2019Applicant: Microsoft Technology Licensing, LLCInventors: Ryen William White, Mathieu Etienne Jacques Audouin, Patrick Pantel, Nikrouz Ghotbi, Anantha Deepthi Uppala, Vanessa Graham Murdock, Mark James Encarnacion, Nirupama Chandrasekaran
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Patent number: 9164372Abstract: A method and system for fracturing or mask data preparation or proximity effect correction is disclosed in which a series of charged particle beam shots is determined, where the series of shots is capable of forming a continuous non-manhattan track on a surface, such that the non-manhattan track has a line width roughness (LWR) which nearly equals a target LWR. A method and system for fracturing or mask data preparation or proximity effect correction is also disclosed in which at least two series of shots are determined, where each series of shots is capable of forming a continuous non-manhattan track on a surface, and where the space between tracks has space width roughness (SWR) which nearly equals a target SWR.Type: GrantFiled: December 19, 2014Date of Patent: October 20, 2015Assignee: D2S, Inc.Inventors: Akira Fujimura, Ingo Bork, Etienne Jacques
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Patent number: 9091946Abstract: A method and system for fracturing or mask data preparation or proximity effect correction is disclosed in which a series of charged particle beam shots is determined, where the series of shots is capable of forming a continuous non-manhattan track on a surface, such that the non-manhattan track has a line width roughness (LWR) which nearly equals a target LWR. A method and system for fracturing or mask data preparation or proximity effect correction is also disclosed in which at least two series of shots are determined, where each series of shots is capable of forming a continuous non-manhattan track on a surface, and where the space between tracks has space width roughness (SWR) which nearly equals a target SWR.Type: GrantFiled: July 23, 2013Date of Patent: July 28, 2015Assignee: D2S, Inc.Inventors: Akira Fujimura, Ingo Bork, Etienne Jacques
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Publication number: 20150104737Abstract: A method and system for fracturing or mask data preparation or proximity effect correction is disclosed in which a series of charged particle beam shots is determined, where the series of shots is capable of forming a continuous non-manhattan track on a surface, such that the non-manhattan track has a line width roughness (LWR) which nearly equals a target LWR. A method and system for fracturing or mask data preparation or proximity effect correction is also disclosed in which at least two series of shots are determined, where each series of shots is capable of forming a continuous non-manhattan track on a surface, and where the space between tracks has space width roughness (SWR) which nearly equals a target SWR.Type: ApplicationFiled: December 19, 2014Publication date: April 16, 2015Inventors: Akira Fujimura, Ingo Bork, Etienne Jacques
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Patent number: 8949750Abstract: A method and system for fracturing or mask data preparation is disclosed in which the central core portion of a diagonal pattern is fractured using overlapping variable shaped beam (VSB) shots, and an outer portion of the diagonal pattern is fractured using non-overlapping VSB shots. A transition region is interposed between the central core and outer pattern portions, and transition region shots are generated so as to produce in the transferred pattern a smooth transition in pattern characteristics such as line edge roughness or period of waviness, from the central core portion of the pattern to the outer portion of the pattern. A pattern determined by the transition region shots is then compared to a reticle pattern created using conventional non-overlapping VSB shots. Methods for forming a semiconductor device layout pattern on a reticle or substrate are also disclosed.Type: GrantFiled: March 13, 2013Date of Patent: February 3, 2015Assignee: D2S, Inc.Inventors: Etienne Jacques, Jin Choi, Kazuyuki Hagiwara
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Patent number: 8865377Abstract: A method and system for fracturing or mask data preparation is disclosed in which the central core portion of a diagonal pattern is fractured using overlapping variable shaped beam (VSB) shots, and an outer portion of the diagonal pattern is fractured using non-overlapping VSB shots. A transition region is interposed between the central core and outer pattern portions, and transition region shots are generated so as to produce in the transferred pattern a smooth transition in pattern characteristics such as line edge roughness or period of waviness, from the central core portion of the pattern to the outer portion of the pattern. Methods for forming a semiconductor device layout pattern on a reticle or substrate are also disclosed.Type: GrantFiled: March 13, 2013Date of Patent: October 21, 2014Assignee: D2S, Inc.Inventors: Etienne Jacques, Jin Choi, Kazuyuki Hagiwara
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Publication number: 20140272675Abstract: A method and system for fracturing or mask data preparation is disclosed in which the central core portion of a diagonal pattern is fractured using overlapping variable shaped beam (VSB) shots, and an outer portion of the diagonal pattern is fractured using non-overlapping VSB shots. A transition region is interposed between the central core and outer pattern portions, and transition region shots are generated so as to produce in the transferred pattern a smooth transition in pattern characteristics such as line edge roughness or period of waviness, from the central core portion of the pattern to the outer portion of the pattern. Methods for forming a semiconductor device layout pattern on a reticle or substrate are also disclosed.Type: ApplicationFiled: March 13, 2013Publication date: September 18, 2014Applicant: D2S, INC.Inventors: Etienne Jacques, Jin Choi, Kazuyuki Hagiwara
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Publication number: 20140282304Abstract: A method and system for fracturing or mask data preparation is disclosed in which the central core portion of a diagonal pattern is fractured using overlapping variable shaped beam (VSB) shots, and an outer portion of the diagonal pattern is fractured using non-overlapping VSB shots. A transition region is interposed between the central core and outer pattern portions, and transition region shots are generated so as to produce in the transferred pattern a smooth transition in pattern characteristics such as line edge roughness or period of waviness, from the central core portion of the pattern to the outer portion of the pattern. A pattern determined by the transition region shots is then compared to a reticle pattern created using conventional non-overlapping VSB shots. Methods for forming a semiconductor device layout pattern on a reticle or substrate are also disclosed.Type: ApplicationFiled: March 13, 2013Publication date: September 18, 2014Applicant: D2S, INC.Inventors: Etienne Jacques, Jin Choi, Kazuyuki Hagiwara
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Publication number: 20130306884Abstract: A method and system for fracturing or mask data preparation or proximity effect correction is disclosed in which a series of charged particle beam shots is determined, where the series of shots is capable of forming a continuous non-manhattan track on a surface, such that the non-manhattan track has a line width roughness (LWR) which nearly equals a target LWR. A method and system for fracturing or mask data preparation or proximity effect correction is also disclosed in which at least two series of shots are determined, where each series of shots is capable of forming a continuous non-manhattan track on a surface, and where the space between tracks has space width roughness (SWR) which nearly equals a target SWR.Type: ApplicationFiled: July 23, 2013Publication date: November 21, 2013Applicant: D2S, INC.Inventors: Akira Fujimura, Ingo Bork, Etienne Jacques
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Publication number: 20120278770Abstract: A method and system for fracturing or mask data preparation or proximity effect correction is disclosed in which a series of charged particle beam shots is determined, where the series of shots is capable of forming a continuous non-manhattan track on a surface, such that the non-manhattan track has a line width roughness (LWR) which nearly equals a target LWR. A method and system for fracturing or mask data preparation or proximity effect correction is also disclosed in which at least two series of shots are determined, where each series of shots is capable of forming a continuous non-manhattan track on a surface, and where the space between tracks has space width roughness (SWR) which nearly equals a target SWR.Type: ApplicationFiled: March 24, 2012Publication date: November 1, 2012Applicant: D2S, INC.Inventors: Akira Fujimura, Ingo Bork, Etienne Jacques
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Publication number: 20120128228Abstract: A method for matching of two detailed patterns is disclosed in which abstracts of each of the detailed patterns are created, where the abstracts are less complex than the detailed patterns. The abstracts are then compared to determine if the detailed patterns may possibly match, where comparison of the abstracts is faster than comparison of the detailed patterns. If comparison of the abstracts indicates a possible match, then the detailed patterns are compared, otherwise no detailed pattern comparison is needed.Type: ApplicationFiled: November 17, 2011Publication date: May 24, 2012Applicant: D2S, INC.Inventors: Akira Fujimura, Thomas Kronmiller, Etienne Jacques, Harold Robert Zable
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Patent number: 8166442Abstract: Some embodiments of the invention provide a Local Preferred Direction (LPD) wiring model for use with one or more EDA tools (such as placing, routing, etc). An LPD wiring model allows at least one wiring layer to have a set of regions that each have a different preferred direction than the particular wiring layer. In addition, each region has a local preferred direction that differs from the local preferred direction of at least one other region in the set. Furthermore, at least two regions have two different polygonal shapes and no region in the set encompasses another region in the set. Some embodiments also provide a Graphical User Interface (GUI) that facilitates a visual presentation of an LPD design layout and provides tools to create and manipulate LPD regions in a design layout.Type: GrantFiled: September 29, 2008Date of Patent: April 24, 2012Assignee: Cadence Design Systems, Inc.Inventors: Asmus Hetzel, Anish Malhotra, Akira Fujimura, Etienne Jacques, Jon Frankle, David S. Harrison, Heath Feather, Alexandre Matveev, Roger King
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Patent number: 8065649Abstract: A method is provided that performs a path search that identifies several path extensions. The method performs a viability check on a particular path extension by identifying first and second circuit geometries. The first circuit geometry is associated with a particular segment of a route that would result from the particular path expansion in a design layout. The second circuit geometry is associated with a circuit element to which the particular segment connects. The viability check also determines whether connecting the segment with the first geometry and the circuit element with the second geometry is allowable based on predetermined rules. The method stores the particular path expansion in a storage medium as a viable path expansion when the viability check determines that connecting the segment with the first geometry and the circuit element with the second geometry is allowable.Type: GrantFiled: December 1, 2008Date of Patent: November 22, 2011Assignee: Cadence Design Systems, Inc.Inventors: Asmus Hetzel, Etienne Jacques
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Patent number: 7721243Abstract: Some embodiments of the invention provide a router that can define a route that has different widths along different directions on the same layer. To facilitate the creation of such a route, some embodiments adaptively define the shape of interconnect-line ends (i.e., the shape of route-segment ends) on a particular layer based on the routing directions available on the particular layer. By so defining these shapes, these embodiments improve the alignment of route segments that have differing widths. In other words, dynamically defining the interconnect-line ends improves the shape of a route at bends along which the route transition from one width to another. Also, to facilitate the creation of a route with different widths and/or spacing in different directions on a particular layer, some embodiments define, for each available routing direction on the particular layer, an “unroutable” bloated region about a previously defined geometry (e.g.Type: GrantFiled: February 9, 2007Date of Patent: May 18, 2010Assignee: Cadence Design Systems, Inc.Inventors: Asmus Hetzel, Etienne Jacques
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Publication number: 20090089735Abstract: Some embodiments of the invention provide a routing method. The routing method receives a set of nets to route in a region of an integrated circuit (“IC”) layout. The routing method defines routes for the nets in a manner that ensures that each segment of each route is not less than a minimum length that is required for the segment. In some embodiments, the routing method identifies a route for a net by performing one or more path search operations, where each path search operation identifies one set of path expansions that can be used to define a segment of a route for the net. A path search operation in some embodiments performs a viability check for each path expansion that it identifies, in order to ensure that any segment that might eventually result from an identified set of path expansions satisfies its minimum required length.Type: ApplicationFiled: December 1, 2008Publication date: April 2, 2009Inventors: Asmus Hetzel, Etienne Jacques
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Publication number: 20090024977Abstract: model for use with one or more EDA tools (such as placing, routing, etc). An LPD wiring model allows at least one wiring layer to have a set of regions that each have a different preferred direction than the particular wiring layer. In addition, each region has a local preferred direction that differs from the local preferred direction of at least one other region in the set. Furthermore, at least two regions have two different polygonal shapes and no region in the set encompasses another region in the set. Some embodiments also provide a Graphical User Interface (GUI) that facilitates a visual presentation of an LPD design layout and provides tools to create and manipulate LPD regions in a design layout.Type: ApplicationFiled: September 29, 2008Publication date: January 22, 2009Inventors: Asmus Hetzel, Anish Malhotra, Akira Fujimura, Etienne Jacques, Jon Frankle, David S. Harrison, Heath Feather, Alexander Matveev, Roger King
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Patent number: 7472366Abstract: Some embodiments of the invention provide a routing method. The routing method receives a set of nets to route in a region of an integrated circuit (“IC”) layout. The routing method defines routes for the nets in a manner that ensures that each segment of each route is not less than a minimum length that is required for the segment. In some embodiments, the routing method identifies a route for a net by performing one or more path search operations. Each path search operation identifies one set of path expansions that can be used to define a segment of a route for the net. A path search operation in some embodiments performs a viability check for each path expansion that it identifies, in order to ensure that any segment that might eventually result from an identified set of path expansions satisfies its minimum required length.Type: GrantFiled: August 1, 2005Date of Patent: December 30, 2008Assignee: Cadence Design Systems, Inc.Inventors: Asmus Hetzel, Etienne Jacques