Abstract: Testing combinatorial logic sectioned into macros. The macros perform functions some of which are linear, such as busses, and some of which are non-linear such as PLAs, with the macros being connected so that the total chip can be tested by testing each macro individually to thereby make it unnecessary to model the totality of the macros collectively in terms of primitive logic.

Abstract: Apparatus for determining the AC or switching delay behavior of an LSI circuit. The apparatus measures the signal propagation along different circuit paths to determine the AC characteristic. Each LSI circuit line under test is connected to a display through a line counter logic block. Each line counter logic block responds to a begin count pulse, counter pulses and stop or reset pulses. The logic block provides numerical count to the display until the line under test switches. The numerical counts on the display for the various lines indicates the AC performance of each circuit as they respond to input data over a selected timing interval.