Patents by Inventor EUGEN PIRVU
EUGEN PIRVU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10915331Abstract: Various aspects include methods for implementing a reduced size firmware storage format on a computing device. Various aspects may include storing a first firmware description table to a first sector of a flash memory, in which the first firmware description table may define a first instance of a firmware including describing a first plurality of firmware images, storing the first plurality of firmware images to a first plurality of consecutive sectors, storing a second firmware description table to a second sector, in which the second firmware description table may define a second instance of the firmware including describing a second plurality of firmware images having a third plurality of firmware images, storing the third plurality of firmware images to a second plurality of consecutive sectors, and booting the computing device using the second firmware description table.Type: GrantFiled: August 4, 2017Date of Patent: February 9, 2021Assignee: QUALCOMM IncorporatedInventors: Eugen Pirvu, Dhamim Packer Ali, Benish Babu, Leonard Widra, Darshana Advani
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Patent number: 10409513Abstract: Certain aspects of the present disclosure provide apparatus and techniques for configuring memory in an effort to reduce power consumption. For example, certain aspects of the present disclosure may provide an apparatus having a processing system configured to determine an operating mode of an application executing on the processing system. The operating mode may be one of a plurality of operating modes of the application, and each operating mode of the plurality of operating modes may correspond to a different configuration of memory. In certain aspects, the configurations of memory may correspond to different portions of memory that are active or inactive. In certain aspects, the apparatus may also include a memory control module configured to configure the memory based on the determined operating mode of the application.Type: GrantFiled: May 8, 2017Date of Patent: September 10, 2019Assignee: QUALCOMM IncorporatedInventors: Gabriel Allen Watkins, Albert Chee-Ming Cheung, Leonard Widra, Venkateshwar Junnuthulla, Selvaraj Jaikumar, Mahesh Dandapani Iyer, Eugen Pirvu, Chad Karaginides
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Patent number: 10346157Abstract: Various aspects include methods for implementing a firmware patch infrastructure. Various aspects may include identifying a patchable object from a firmware source code image based on a symbol in the patchable object's name, generating a patchable firmware source code file by injecting a first call to the patchable object configured to call to an indirection table and a second call to the patchable object configure to execute the patchable object, building a patchable firmware source code image from a plurality of patchable firmware source code files including the patchable firmware source code file having the first call to the patchable object and the second call to the patchable object, and creating the indirection table including an entry for the first call from the patchable firmware source code image having an indication to implement the second call in the patchable firmware source code image.Type: GrantFiled: July 31, 2017Date of Patent: July 9, 2019Assignee: QUALCOMM IncorporatedInventors: Eugen Pirvu, Dhaval Patel, Dhamim Packer Ali, Bhargav Gurappadi
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Publication number: 20190080093Abstract: Techniques for the secure loading of dynamic paged segments are provided. An example method according to the disclosure includes determining a first hash value for each of one or more pageable segments associated with a device, authenticating the one or more pageable segments based on the first hash values, determining a second hash value for each of the one or more pageable segments, transferring the second hash values for each of the pageable segments to the device, determining a load hash value for a loading pageable segment when the loading pageable segment is to be loaded into the device, comparing the load hash value with the second hash value associated with the loading pageable segment, and loading the loading pageable segment in the device when the load hash value matches the second hash value associated with the loading pageable segment.Type: ApplicationFiled: September 12, 2017Publication date: March 14, 2019Inventors: Eugen PIRVU, Dhamim PACKER ALI, Dhaval Patel, Bhargav GURAPPADI
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Publication number: 20190042278Abstract: Various aspects include methods for implementing a reduced size firmware storage format on a computing device. Various aspects may include storing a first firmware description table to a first sector of a flash memory, in which the first firmware description table may define a first instance of a firmware including describing a first plurality of firmware images, storing the first plurality of firmware images to a first plurality of consecutive sectors, storing a second firmware description table to a second sector, in which the second firmware description table may define a second instance of the firmware including describing a second plurality of firmware images having a third plurality of firmware images, storing the third plurality of firmware images to a second plurality of consecutive sectors, and booting the computing device using the second firmware description table.Type: ApplicationFiled: August 4, 2017Publication date: February 7, 2019Inventors: Eugen PIRVU, Dhamim PACKER ALI, Benish BABU, Leonard WIDRA, Darshana ADVANI
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Publication number: 20190034195Abstract: Systems, methods, and computer programs are disclosed for providing patchable read only memory (ROM) firmware. One method comprises receiving source code to be used as input for building a read only memory (ROM) image stored on a system on chip (SoC). One or more of a plurality of ROM functions in the source code to be made patchable are identified. The source code for the one or more of the plurality of ROM functions to be made patchable is modified by generating and inserting patching code into the corresponding source code. The patching code comprises a link to a fixed location in random access memory (RAM) for calling the corresponding function.Type: ApplicationFiled: July 26, 2017Publication date: January 31, 2019Inventors: EUGEN PIRVU, DHAMIM PACKER ALI, DHAVAL PATEL, BHARGAV GURAPPADI
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Publication number: 20190034196Abstract: Various aspects include methods for implementing a firmware patch infrastructure. Various aspects may include identifying a patchable object from a firmware source code image based on a symbol in the patchable object's name, generating a patchable firmware source code file by injecting a first call to the patchable object configured to call to an indirection table and a second call to the patchable object configure to execute the patchable object, building a patchable firmware source code image from a plurality of patchable firmware source code files including the patchable firmware source code file having the first call to the patchable object and the second call to the patchable object, and creating the indirection table including an entry for the first call from the patchable firmware source code image having an indication to implement the second call in the patchable firmware source code image.Type: ApplicationFiled: July 31, 2017Publication date: January 31, 2019Inventors: Eugen PIRVU, Dhaval Patel, Dhamin Packer Ali, Bhargav Gurappadi
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Publication number: 20180321865Abstract: Certain aspects of the present disclosure provide apparatus and techniques for configuring memory in an effort to reduce power consumption. For example, certain aspects of the present disclosure may provide an apparatus having a processing system configured to determine an operating mode of an application executing on the processing system. The operating mode may be one of a plurality of operating modes of the application, and each operating mode of the plurality of operating modes may correspond to a different configuration of memory. In certain aspects, the configurations of memory may correspond to different portions of memory that are active or inactive. In certain aspects, the apparatus may also include a memory control module configured to configure the memory based on the determined operating mode of the application.Type: ApplicationFiled: May 8, 2017Publication date: November 8, 2018Inventors: Gabriel Allen WATKINS, Albert Chee-Ming CHEUNG, Leonard WIDRA, Venkateshwar JUNNUTHULLA, Selvaraj JAIKUMAR, Mahesh Dandapani IYER, Eugen PIRVU, Chad KARAGINIDES
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Publication number: 20170308705Abstract: Technologies for updating a processing device, where a first device image is stored in a first (non-volatile) memory. When a new second device image is received via a communication interface, a first boot of the device is performed and a boot loader performs security processing on the second device image. Once security processing has passed, the second device image is set as a trial image and executed. The executed image is monitored to determine if predetermined operational parameters in the device are met. If the parameters are met, the second device image is set as a current image and the first device image is deactivated. A second boot is performed to make the new image operational for the device and the anti-rollback version one-time programmable fuses are blown. If the parameters are not met, the device revers to the first device image.Type: ApplicationFiled: April 22, 2016Publication date: October 26, 2017Inventors: Chad Karaginides, Xu Guo, Eugen Pirvu, Dhaval Patel, Ron Keidar, Amit Shukla, Selvaraj Jaikumar, Yau Chu
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Patent number: 9749141Abstract: A secure boot method includes: obtaining a certificate digest at a digest processor from a write-once, always-on memory; calculating a flash digest using the digest processor by cryptographically processing a sensitive information image; and comparing, using the digest processor, the flash digest with the certificate digest.Type: GrantFiled: September 25, 2015Date of Patent: August 29, 2017Assignee: QUALCOMM IncorporatedInventors: Ron Keidar, Eugen Pirvu, Jeff Smith
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Publication number: 20170123788Abstract: A system and method for patching a boot sequence in a read-only memory. Patch instances are provided in an addressable memory. The patch instances are initially empty. The read-only memory includes a process that dynamically vectors to identified locations in a set of addressable memory locations in the addressable memory. Thereafter, the process returns to the next subsequent instruction following the patch instance. As corrections are required, the one or more patch instances are populated with one or more respective patches. The boot sequence is modified by inserting one or more patch indicators located where patches might need to be applied after a system-on-chip (SoC) is embodied in firmware. The patches, when defined, are populated with at least an encoded instruction type and an address. Accordingly, a patch is enabled in no more than three words.Type: ApplicationFiled: January 6, 2017Publication date: May 4, 2017Inventors: EUGEN PIRVU, Dhamim Packer Ali, Ashutosh Jagddish Shrivastava
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Publication number: 20170093582Abstract: A secure boot method includes: obtaining a certificate digest at a digest processor from a write-once, always-on memory; calculating a flash digest using the digest processor by cryptographically processing a sensitive information image; and comparing, using the digest processor, the flash digest with the certificate digest.Type: ApplicationFiled: September 25, 2015Publication date: March 30, 2017Inventors: Ron KEIDAR, Eugen PIRVU, Jeff SMITH
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Patent number: 9547489Abstract: A system and method for patching a boot sequence in a read-only memory. Patch instances are provided in an addressable memory. The patch instances are initially empty. The read-only memory includes a process that dynamically vectors to identified locations in a set of addressable memory locations in the addressable memory. Thereafter, the process returns to the next subsequent instruction following the patch instance. As corrections are required, the one or more patch instances are populated with one or more respective patches. The boot sequence is modified by inserting one or more patch indicators located where patches might need to be applied after a system-on-chip (SoC) is embodied in firmware. The patches, when defined, are populated with at least an encoded instruction type and an address. Accordingly, a patch is enabled in no more than three words.Type: GrantFiled: June 17, 2014Date of Patent: January 17, 2017Assignee: QUALCOMM INCORPORATEDInventors: Eugen Pirvu, Dhamim Packer Ali, Ashutosh Jagdish Shrivastava
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Publication number: 20150277894Abstract: A system and method for patching a boot sequence in a read-only memory. Patch instances are provided in an addressable memory. The patch instances are initially empty. The read-only memory includes a process that dynamically vectors to identified locations in a set of addressable memory locations in the addressable memory. Thereafter, the process returns to the next subsequent instruction following the patch instance. As corrections are required, the one or more patch instances are populated with one or more respective patches. The boot sequence is modified by inserting one or more patch indicators located where patches might need to be applied after a system-on-chip (SoC) is embodied in firmware. The patches, when defined, are populated with at least an encoded instruction type and an address. Accordingly, a patch is enabled in no more than three words.Type: ApplicationFiled: June 17, 2014Publication date: October 1, 2015Inventors: EUGEN PIRVU, DHAMIM PACKER ALI, ASHUTOSH JAGDISH SHRIVASTAVA