Patents by Inventor Eugen Warkentin

Eugen Warkentin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • FPGA-based adjustable clock for audio devices
    Patent number: 12476638
    Abstract: An adjustable clock that may be implemented on a field-programmable gate array (FPGA). The adjustable clock may be highly accurate and stable, and may be adjustable in response to software commands. The adjustable clock may be configured to generate a clock signal that is synchronized in frequency and/or phase with a clock that is external to the FPGA, such as a Precision Time Protocol (PTP) clock. The FPGA may implement the adjustable clock with a number of elements as programmable logic, including a numerically-controlled frequency divider, a multi-tap delay line, logic configured to dynamically select, for each clock pulse, a delay of the multi-tap delay line, and a feedback loop to control the numerically-controlled frequency divider.
    Type: Grant
    Filed: September 8, 2023
    Date of Patent: November 18, 2025
    Assignee: Shure Acquisition Holdings, Inc.
    Inventors: Eugen Warkentin, Mack Mansouri
  • FPGA-Based Adjustable Clock for Audio Devices
    Publication number: 20250088191
    Abstract: An adjustable clock that may be implemented on a field-programmable gate array (FPGA). The adjustable clock may be highly accurate and stable, and may be adjustable in response to software commands. The adjustable clock may be configured to generate a clock signal that is synchronized in frequency and/or phase with a clock that is external to the FPGA, such as a Precision Time Protocol (PTP) clock. The FPGA may implement the adjustable clock with a number of elements as programmable logic, including a numerically-controlled frequency divider, a multi-tap delay line, logic configured to dynamically select, for each clock pulse, a delay of the multi-tap delay line, and a feedback loop to control the numerically-controlled frequency divider.
    Type: Application
    Filed: September 8, 2023
    Publication date: March 13, 2025
    Inventors: Eugen Warkentin, Mack Mansouri