Abstract: A heterostructure includes a stained epitaxial layer of either silicon or germanium that is located overlying a silicon substrate, with a spatially graded Ge.sub.x Si.sub.1-x epitaxial layer overlain by a ungraded Ge.sub.x.sbsb.0 Si.sub.1-x.sbsb.0 intervening between the silicon substrate and the strained layer. Such a heterostructure can serve as a foundation for such devices as surface emitting LEDs, either n-channel or p-channel silicon-based MODFETs, and either n-channel or p-channel silicon-based MOSFETs.

Abstract: The invention is predicated upon the discovery by applicants that exposure of a Ge surface to arsenic produces a drastic change in the step structure of the Ge surface. Subsequent exposure to Ga and growth of GaAs produces three-dimensional growth and a high threading dislocation density at the GaAs/Ge interface. However exposure of the Ge surface to Ga does not substantially change the Ge step structure, and subsequent growth of GaAs is two-dimensional with little increase in threading dislocation density. Thus a high quality semiconductor heterostructure of gallium arsenide on germanium can be made by exposing a germanium surface in an environment substantially free of arsenic, depositing a layer of gallium on the surface and then growing a layer of gallium arsenide. The improved method can be employed to make a variety of optoelectronic devices such as light-emitting diodes.

Abstract: Semiconductor devices having a low density of dislocation defects can be formed of epitaxial layers grown on defective or misfit substrates by making the thickness of the epitaxial layer sufficiently large in comparison to the maximum lateral dimension. With sufficient thickness, threading dislocations arising from the interface will exit the sides of the epitaxial structure and not reach the upper surface. Using this approach, one can fabricate integral gallium arsenide on silicon optoelectronic devices and parallel processing circuits. One can also improve the yield of lasers and photodetectors.

Abstract: The present invention is predicated upon the discovery by applicants that by growing germanium-silicon alloy at high temperatures in excess of about 850.degree. C. and increasing the germanium content at a gradient of less than about 25% per micrometer, one can grow on silicon large area heterostructures of graded Ge.sub.x Si.sub.1-x alloy having a low level of threading dislocation defects. With low concentrations of germanium 0.10.ltoreq..times..ltoreq.0.50), the heterolayer can be used as a substrate for growing strained layer silicon devices such as MODFETS. With high concentrations of Ge (0.65.ltoreq..times..ltoreq.1.00) the heterolayer can be used on silicon substrates as a buffer layer for indium gallium phosphide devices such as light emitting diodes and lasers. At concentrations of pure germanium (X=1.00), the heterolayer can be used for GaAs or GaAs/AlGaAs devices.

Abstract: Semiconductor devices having a low density of dislocation defects can be formed of epitaxial layers grown on defective or misfit substrates by making the thickness of the epitaxial layer sufficiently large in comparison to the maximum lateral dimension. With sufficient thickness, threading dislocations arising from the interface will exit the sides of the epitaxial structure and not reach the upper surface. Using this approach, one can fabricate integral gallium arsenide on silicon optoelectronic devices and parallel processing circuits. One can also improve the yield of lasers and photodetectors.

Abstract: The present invention and process relates to crystal lattice mismatched semiconductor composite having a first semiconductor layer and a second semiconductor growth layer deposited thereon to form an interface wherein the growth layer can be deposited at thicknesses in excess of the critical thickness, even up to about 10.times. critical thickness. Such composite has an interface which is substantially free of interface defects. For example, the size of the growth areas in a mismatched In.sub.0.05 Ga.sub.0.95 As/(001)GaAs interface was controlled by fabricating 2-.mu.m high pillars of various lateral geometries and lateral dimensions before the epitaxial deposition of 3500.ANG. of In.sub.0.05 Ga.sub.0.95 As. The linear dislocation density at the interface was reduced from >5000 dislocations/cm to about zero for 25-.mu.m lateral dimensions and to less than 800 dislocations/cm for lateral dimensions as large as 100 .mu.m.

Abstract: The present invention and process relates to crystal lattice mismatched semiconductor composite having a first semiconductor layer and a second semiconductor growth layer deposited thereon to form an interface wherein the growth layer can be deposited at thicknesses in excess of the critical thickness, even up to about 10x critical thickness. Such composite has an interface which is substantially free of interface defects. For example, the size of the growth areas in a mismatched In.sub.0.05 Ga.sub.0.95 As/(001)GaAs interface was controlled by fabricating 2-.mu.m high pillars of various lateral geometries and lateral dimensions before the epitaxial deposition of 3500.ANG. of In.sub.0.05 Ga.sub.0.95 As. The linear dislocation density at the interface was reduced from >5000 dislocations/cm to about zero for 25-.mu.m lateral dimensions and to less than 800 dislocations/cm for lateral dimensions as large as 100 .mu.m.