Abstract: An example image device includes a compressor to compress image data from a row-and-column format into non-overlapping tiles including blocks of pixels, a processor to write the blocks of pixels one tile at a time in a column-wise manner across an image strip to create image data, and an on-chip memory to store the image data.

Abstract: A method comprising storing a first line of data that is received from processing circuitry across a first set of conductors prior to receiving a first signal from a laser engine having a plurality of laser units and providing the first line of data and a second line of data that is received from the processing circuitry across the first set of conductors to the laser engine in response to receiving the first signal is provided.

Abstract: An implementation of a technology, described herein, for efficient and flexible multi-bit halftoning on a marking device, such as a printer. At least one implementation of the technology, described herein, performs multi-bit halftoning with hardware (e.g., circuitry) rather than a programmable processor. Furthermore, at least one implementation performs multi-bit halftoning for a variable number of bits per pixel and a variable resolution. This abstract itself is not intended to limit the scope of this patent. The scope of the present invention is pointed out in the appending claims.

Abstract: A method for adjusting a laser diode drive current pulse, comprises providing a power correction table comprising drive current pulse correction factors corresponding to counter positions. The method also comprises providing a jump table comprising counter position adjustments corresponding to correction factors. A count value of a position within the counter positions is maintained. Maintaining the count value comprises indexing the count value to the jump table and incrementing the count value for each of a series of pixel clocks. A correction factor is determined, wherein determining the current correction factor comprises indexing the count value to the power correction table.

Abstract: A memory integrated into a removable cartridge for an image forming device is formatted to store a state variable reflecting a state of a printing component. A method embodiment includes reading the state variable. An image enhancement technique, selected according to the state variable, is implemented. In another embodiment, the memory contains technique selection criteria. The technique selection criteria is processed with the state variable to select a template set identifying one or more image enhancement techniques.

Abstract: An apparatus and system include means to identify first and second pixel toner densities associated with selected pixels included in a color plane window, and means to generate at least one modified color plane window having identifications assigned to the pixel toner densities for transmission to a monochrome enhancement module. An article contains instructions causing a machine to execute a method including selecting a plurality of original color plane windows, each having a number of pixels, associating each pixel in each of the windows with an identification of VALID or INVALID, generating a plurality of modified windows to correspond to the plurality of original windows, wherein each one of the plurality of modified windows includes the associated identifications, and transmitting the modified windows to a monochrome enhancement module.

Abstract: A method for adjusting a laser diode drive current pulse, comprises providing a power correction table comprising drive current pulse correction factors corresponding to counter positions. The method also comprises providing a jump table comprising counter position adjustments corresponding to correction factors. A count value of a position within the counter positions is maintained. Maintaining the count value comprises indexing the count value to the jump table and incrementing the count value for each of a series of pixel clocks. A correction factor is determined, wherein determining the current correction factor comprises indexing the count value to the power correction table.

Abstract: The system, methods and hardware described herein relate to processing raster data on an EP (electrophotographic) process printing device. A hardware ASIC supports multiple EP print engine configurations through a common delay window block that presents a variable two-dimensional view of raster data formatted in a consistent manner that is compatible for processing by various enhancement blocks. Benefits of the disclosed system, methods and hardware include decreased development costs for EP printers due to a reduced need to design, test, and manufacture different ASICs for numerous EP print engine configurations.

Abstract: The present invention is a method and system for mixed resolution, multi-channel color image processing including compression, transmission and decompression. The color information is defined at a lower resolution since colors generally do not change at a high frequency and higher compression ratios may be obtained with the lower resolution. The edge information contains the commands switch between the foreground and background colors. The edge information occurs at high resolution and high frequency rates relative to the color information. The lower resolution color planes can be pixel replicated to the resolution of the edge information after compression and decompression for proper edge selection to occur. The resulting reconstructed image of foreground and background colors retains high detail.

Abstract: Memory integrated into a removable cartridge for an image forming device is programmed with image enhancement data. The image enhancement data includes a condition associated with data identifying an image enhancement technique and a parameter for implementing the image enhancement technique.

Abstract: Memory integrated into a removable cartridge for an image forming device contains image enhancement data identifying an image enhancement technique. In a method embodiment, the data is read, and the image enhancement technique identified by the image enhancement data is implemented. In another embodiment, the image enhancement data includes a parameter. The image enhancement data is read, and an image enhancement technique is implemented according to the parameter.

Abstract: A memory integrated into a removable cartridge for an image forming device is formatted to store a state variable reflecting a state of a printing component. A method embodiment includes reading the state variable. An image enhancement technique, selected according to the state variable, is implemented. In another embodiment, the memory contains technique selection criteria. The technique selection criteria is processed with the state variable to select a template set identifying one or more image enhancement techniques.

Abstract: An apparatus and system include means to identify first and second pixel toner densities associated with selected pixels included in a color plane window, and means to generate at least one modified color plane window having identifications assigned to the pixel toner densities for transmission to a monochrome enhancement module. An article contains instructions causing a machine to execute a method including selecting a plurality of original color plane windows, each having a number of pixels, associating each pixel in each of the windows with an identification of VALID or INVALID, generating a plurality of modified windows to correspond to the plurality of original windows, wherein each one of the plurality of modified windows includes the associated identifications, and transmitting the modified windows to a monochrome enhancement module.

Abstract: Lower resolution source data is synthesized to a higher resolution format for subsequent rendering on a lower resolution output device. Synthesis occurs by selecting or generating and using a synthesis template that represents a configuration of a plurality of pixel data in the higher resolution format into which the lower resolution source data is to be synthesized. A working or active pixel is identified from the lower resolution source data, a synthesis template is selected, and then the synthesis template pixel data is substituted for the working pixel for rendering on the output device. The synthesized higher resolution data is rendered in a manner such that dots represented by the synthesized data are formed interstitially relative to scan lines of the given lower raster/resolution capability of the output device. The working pixel is identified in the lower resolution data by recognizing a configuration of a plurality of pixel data adjacent the working pixel.

Abstract: The present invention is a method and system for mixed resolution, multi-channel color image processing including compression, transmission and decompression. The color information is defined at a lower resolution since colors generally do not change at a high frequency and higher compression ratios may be obtained with the lower resolution. The edge information contains the commands switch between the foreground and background colors. The edge information occurs at high resolution and high frequency rates relative to the color information. The lower resolution color planes can be pixel replicated to the resolution of the edge information after compression and decompression for proper edge selection to occur. The resulting reconstructed image of foreground and background colors retains high detail.

Abstract: The system, methods and hardware described herein relate to processing raster data on an EP (electrophotographic) process printing device. A hardware ASIC supports multiple EP print engine configurations through a common delay window block that presents a variable two-dimensional view of raster data formatted in a consistent manner that is compatible for processing by various enhancement blocks. Benefits of the disclosed system, methods and hardware include decreased development costs for EP printers due to a reduced need to design, test, and manufacture different ASICs for numerous EP print engine configurations.

Abstract: An implementation of a technology, described herein, for efficient and flexible multi-bit halftoning on a marking device, such as a printer. At least one implementation of the technology, described herein, performs multi-bit halftoning with hardware (e.g., circuitry) rather than a programmable processor. Furthermore, at least one implementation performs multi-bit halftoning for a variable number of bits per pixel and a variable resolution. This abstract itself is not intended to limit the scope of this patent. The scope of the present invention is pointed out in the appending claims.

Abstract: Configurable image processing logic is provided for use in image processing devices. The configurable image processing logic includes memory and a plurality of image processing logic modules implementing different image processing algorithms. The logic modules are selectively configured and operated via communication logic that allows for a variety of different paths through the image processing logic modules to form an applicable image processing pipeline for a given image processing data/task.

Abstract: A pulse width modulator (PWM) circuit is provided. The PWM circuit includes a selective synchronization circuit configured to receive vector signals, and selectively synchronize the vector signals. The synchronized vector signals are provided to a tap selection circuit configured to output tap selection signals that are logically combined by a transition generating circuit to produce a pulse width modulated signal based on logically detected transitions in the tap selection signals.

Abstract: The present invention provides both differential and integral non-linearity measurement capabilities with a minimum of additional hardware and a test time reduction of several orders of magnitude. The test circuit for N delay lines includes a ring oscillator that has a select signal and an output. A counter is connected in parallel with the ring oscillator. An arithmetic logic unit receives a “COMPARE” value from a register and the counter output. An upper and a lower bound register store acceptable tolerances for non-linearity. Each comparator, upper and lower bound, receives the tolerance stored in the corresponding register and the output of the arithmetic logic unit. An AND gate receives the outputs of the upper and lower bound comparators and generates a signal indicative of the state of the oscillator.