Patents by Inventor Eugene C. Ho

Eugene C. Ho has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8692573
    Abstract: Embodiments of a memory controller are described. This memory controller communicates signals to a memory device via a signal line, which can be a data signal line or a command/address signal line. Termination of the signal line is divided between an external impedance outside of the memory controller and an internal impedance within the memory controller. The memory controller does not activate the external impedance prior to communicating the signals and, therefore, does not deactivate the external impedance after communicating the signals. The internal impedance of the memory controller can be enabled or disabled in order to reduce interface power consumption. Moreover, the internal impedance may be implemented using a passive component, an active component or both. For example, the internal impedance may include either or both an on-die termination and at least one driver.
    Type: Grant
    Filed: December 9, 2011
    Date of Patent: April 8, 2014
    Assignee: Rambus Inc.
    Inventors: Kyung Suk Oh, Woopoung Kim, Huy M. Nguyen, Eugene C. Ho
  • Patent number: 8378699
    Abstract: An integrated circuit is described. The integrated circuit includes an interface circuit that includes a transmitter and a receiver. A generator in the integrated circuit is selectively coupled to the transmitter. The generator is to provide a test sequence that is output by the transmitter during a test mode of operation. A memory in the integrated circuit is selectively coupled to the generator and the receiver. The memory is to receive and synchronize the test sequence and a signal corresponding to the test sequence that is received by the receiver. A logic circuit in the integrated circuit is to compare the test sequence and the signal.
    Type: Grant
    Filed: April 27, 2009
    Date of Patent: February 19, 2013
    Assignee: Rambus Inc.
    Inventors: Bret Stott, Philip Yeung, John W. Brooks, Benedict Lau, Chanh V. Tran, Eugene C. Ho
  • Publication number: 20120081146
    Abstract: Embodiments of a memory controller are described. This memory controller communicates signals to a memory device via a signal line, which can be a data signal line or a command/address signal line. Termination of the signal line is divided between an external impedance outside of the memory controller and an internal impedance within the memory controller. The memory controller does not activate the external impedance prior to communicating the signals and, therefore, does not deactivate the external impedance after communicating the signals. The internal impedance of the memory controller can be enabled or disabled in order to reduce interface power consumption. Moreover, the internal impedance may be implemented using a passive component, an active component or both. For example, the internal impedance may include either or both an on-die termination and at least one driver.
    Type: Application
    Filed: December 9, 2011
    Publication date: April 5, 2012
    Applicant: RAMBUS INC.
    Inventors: Kyung Suk Oh, Woopoung Kim, Huy M. Nguyen, Eugene C. Ho
  • Patent number: 8130010
    Abstract: Embodiments of a memory controller are described. This memory controller communicates signals to a memory device via a signal line, which can be a data signal line or a command/address signal line. Termination of the signal line is divided between an external impedance outside of the memory controller and an internal impedance within the memory controller. The memory controller does not activate the external impedance prior to communicating the signals and, therefore, does not deactivate the external impedance after communicating the signals. The internal impedance of the memory controller can be enabled or disabled in order to reduce interface power consumption. Moreover, the internal impedance may be implemented using a passive component, an active component or both. For example, the internal impedance may include either or both an on-die termination and at least one driver.
    Type: Grant
    Filed: February 7, 2011
    Date of Patent: March 6, 2012
    Assignee: Rambus Inc.
    Inventors: Kyung Suk Oh, Woopoung Kim, Huy M. Nguyen, Eugene C. Ho
  • Publication number: 20110128040
    Abstract: Embodiments of a memory controller are described. This memory controller communicates signals to a memory device via a signal line, which can be a data signal line or a command/address signal line. Termination of the signal line is divided between an external impedance outside of the memory controller and an internal impedance within the memory controller. The memory controller does not activate the external impedance prior to communicating the signals and, therefore, does not deactivate the external impedance after communicating the signals. The internal impedance of the memory controller can be enabled or disabled in order to reduce interface power consumption. Moreover, the internal impedance may be implemented using a passive component, an active component or both. For example, the internal impedance may include either or both an on-die termination and at least one driver.
    Type: Application
    Filed: February 7, 2011
    Publication date: June 2, 2011
    Applicant: RAMBUS INC.
    Inventors: Kyung Suk Oh, Woopoung Kim, Huy M. Nguyen, Eugene C. Ho
  • Patent number: 7915912
    Abstract: Embodiments of a memory controller are described. This memory controller communicates signals to a memory device via a signal line, which can be a data signal line or a command/address signal line. Termination of the signal line is divided between an external impedance outside of the memory controller and an internal impedance within the memory controller. The memory controller does not activate the external impedance prior to communicating the signals and, therefore, does not deactivate the external impedance after communicating the signals. The internal impedance of the memory controller can be enabled or disabled in order to reduce interface power consumption. Moreover, the internal impedance may be implemented using a passive component, an active component or both. For example, the internal impedance may include either or both an on-die termination and at least one driver.
    Type: Grant
    Filed: September 9, 2009
    Date of Patent: March 29, 2011
    Assignee: Rambus Inc.
    Inventors: Kyung Suk Oh, Woopoung Kim, Huy M. Nguyen, Eugene C. Ho
  • Publication number: 20100185810
    Abstract: Systems and methods are provided for in-DRAM cycle-based levelization. In a multi-rank, multi-lane memory system, an in-DRAM cycle-based levelization mechanism couples to a memory device in a rank and individually controls additive write latency and/or additive read latency for the memory device. The in-DRAM levelization mechanism ensures that a distribution of relative total write or read latencies across the lanes in the rank is substantially similar to that in another rank.
    Type: Application
    Filed: June 12, 2008
    Publication date: July 22, 2010
    Applicant: RAMBUS INC.
    Inventors: Julia K. Cline, Eugene C. Ho, Bret G. Stott, Frederick A. Ware
  • Publication number: 20100073023
    Abstract: Embodiments of a memory controller are described. This memory controller communicates signals to a memory device via a signal line, which can be a data signal line or a command/address signal line. Termination of the signal line is divided between an external impedance outside of the memory controller and an internal impedance within the memory controller. The memory controller does not activate the external impedance prior to communicating the signals and, therefore, does not deactivate the external impedance after communicating the signals. The internal impedance of the memory controller can be enabled or disabled in order to reduce interface power consumption. Moreover, the internal impedance may be implemented using a passive component, an active component or both. For example, the internal impedance may include either or both an on-die termination and at least one driver.
    Type: Application
    Filed: September 9, 2009
    Publication date: March 25, 2010
    Applicant: RAMBUS INC.
    Inventors: Kyung Suk Oh, Woopoung Kim, Huy M. Nguyen, Eugene C. Ho
  • Publication number: 20090206867
    Abstract: An integrated circuit is described. The integrated circuit includes an interface circuit that includes a transmitter and a receiver. A generator in the integrated circuit is selectively coupled to the transmitter. The generator is to provide a test sequence that is output by the transmitter during a test mode of operation. A memory in the integrated circuit is selectively coupled to the generator and the receiver. The memory is to receive and synchronize the test sequence and a signal corresponding to the test sequence that is received by the receiver. A logic circuit in the integrated circuit is to compare the test sequence and the signal.
    Type: Application
    Filed: April 27, 2009
    Publication date: August 20, 2009
    Inventors: Bret Stott, Philip Yeung, John W. Brooks, Benedict Lau, Chanh V. Tran, Eugene C. Ho
  • Patent number: 7535242
    Abstract: An integrated circuit is described. The integrated circuit includes an interface circuit that includes a transmitter and a receiver. A generator in the integrated circuit is selectively coupled to the transmitter. The generator is to provide a test sequence that is output by the transmitter during a test mode of operation. A memory in the integrated circuit is selectively coupled to the generator and the receiver. The memory is to receive and synchronize the test sequence and a signal corresponding to the test sequence that is received by the receiver. A logic circuit in the integrated circuit is to compare the test sequence and the signal.
    Type: Grant
    Filed: May 3, 2006
    Date of Patent: May 19, 2009
    Assignee: Rambus Inc.
    Inventors: Bret Stott, Philip Yeung, John W. Brooks, Benedict Lau, Chanh V. Tran, Eugene C. Ho