Patents by Inventor Eugene Chow
Eugene Chow has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20260075327Abstract: A machine vision system uses lensless near-contact imaging with coherent illumination, or incoherent illumination, and high pixel count large format sensors (e.g., equivalent to at least 20 to 65 mega-pixels) to produce diffraction patterns of the micro-objects or the gray scale images of the micro-objects over a large overall field-of-view of the machine vision system. The machine vision system provides feedback to a microassembler system to position, orient, and assemble microscale devices, such as micro-LEDs, over large working areas. The effective resolution of the machine vision system can be further improved by using grayscale and super-resolution image processing techniques.Type: ApplicationFiled: November 17, 2025Publication date: March 12, 2026Inventors: Patrick Yasuo MAEDA, Jeng PING LU, Eugene CHOW
-
Patent number: 12477237Abstract: A machine vision system and method use lensless near-contact imaging with coherent illumination, or incoherent illumination, and high pixel count large format sensors (e.g., equivalent to at least 20 to 65 mega-pixels) to produce diffraction patterns of the micro-objects or the gray scale images of the micro-objects over a large overall field-of-view of the machine vision system. The machine vision system provides feedback to a microassembler system to position, orient, and assemble microscale devices like micro-LEDs over large working areas. The effective resolution of the machine vision system can be further improved through the use of gray scale and super-resolution image processing techniques.Type: GrantFiled: December 5, 2023Date of Patent: November 18, 2025Assignee: Xerox CorporationInventors: Patrick Yasuo Maeda, Jeng Ping Lu, Eugene Chow
-
Publication number: 20250184623Abstract: A machine vision system and method use lensless near-contact imaging with coherent illumination, or incoherent illumination, and high pixel count large format sensors (e.g., equivalent to at least 20 to 65 mega-pixels) to produce diffraction patterns of the micro-objects or the gray scale images of the micro-objects over a large overall field-of-view of the machine vision system. The machine vision system provides feedback to a microassembler system to position, orient, and assemble microscale devices like micro-LEDs over large working areas. The effective resolution of the machine vision system can be further improved through the use of gray scale and super-resolution image processing techniques.Type: ApplicationFiled: December 5, 2023Publication date: June 5, 2025Inventors: Patrick Yasuo MAEDA, Jeng PING LU, Eugene CHOW
-
Patent number: 8541741Abstract: A photonic measurement system, such as an atomic absorption spectrometer, includes source, sample and detection modules that are interconnected by fiber optic cables. A first set of fiber optic cables guides light from one or more light sources in the source module to each of at least two analysis chambers in the sample module. A second set of fiber optic cables guides light from the analysis chambers to a detector in the detection module. The detector provides to a processing sub-system signals that correspond to intensities of the guided light. One analysis chamber is selected to perform a sample analysis at a given time, and the processing sub-system processes the signals associated with the selected analysis chamber as measurement signals. The processing sub-system may further process the signals associated with a given non-selected analysis chamber as reference signals.Type: GrantFiled: November 18, 2010Date of Patent: September 24, 2013Assignee: PerkinElmer Health Sciences, Inc.Inventors: Juan C. Ivaldi, Paul L. St. Cyr, Eugene Chow, Mark C. Werner
-
Patent number: 7995081Abstract: An addressable imaging belt for use in printing applications having embedded anisotropically conductive addressable islands configured for electric contact on a first side of the belt by a write head consisting of an array of compliant cantilevered fingers with contact pads/points to which a voltage can be applied. The conductive addressable islands electrically isolated from one another and extending substantially through the thickness of the belt in order to allow charge to flow through the belt towards a second side of the belt, in order to form a latent electrostatic image on the second side and develop this latent image by attracting colorized toner or other electrically charged particles to the second side.Type: GrantFiled: June 25, 2008Date of Patent: August 9, 2011Assignee: Palo Alto Research Center IncorporatedInventors: Timothy D. Stowe, Chu-heng Liu, Jeng Ping Lu, Eugene Chow, Gregory B. Anderson, Armin Völkel, Eric Peeters
-
Publication number: 20110185925Abstract: A printing sub-system including same including a pixilated photoconductive member (such as a photobelt) is disclosed. Electrically isolated cells hold surface application material above the photoconductor. The surface application material is first charged. Charge on the surface application material in an individual cell may then be discharged by exposure of a region of the photoconductor proximate that cell to light from an optical addressing system. The surface application material is brought into proximity of an image receiving member such as paper, which is either charged or proximate a charge source. Charged surface application material in a cell may then be electrostatically transferred from the cell onto the image receiving member, while discharged surface application material remains in the cell. The subsystem may form a part of a complete printing system using many existing components. Among other advantages, viscous liquid surface application material may thereby be printed.Type: ApplicationFiled: January 29, 2010Publication date: August 4, 2011Applicant: Palo Alto Research Center IncorporatedInventors: Eugene Chow, Jeng Ping Lu
-
Publication number: 20110167526Abstract: A stress-engineered microspring is formed generally in the plane of a substrate. A nanowire (or equivalently, a nanotube) is formed at the tip thereof, also in the plane of the substrate. Once formed, the length of the nanowire may be defined, for example photolithographically. A sacrificial layer underlying the microspring may then be removed, allowing the engineered stresses in the microspring to cause the structure to bend out of plane, elevating the nanowire off the substrate and out of plane. Use of the nanowire as a contact is thereby provided. The nanowire may be clamped at the tip of the microspring for added robustness. The nanowire may be coated during the formation process to provide additional functionality of the final device.Type: ApplicationFiled: March 10, 2011Publication date: July 7, 2011Applicant: PALO ALTO RESEARCH CENTER INCORPORATEDInventors: Eugene Chow, Pengfei Qi
-
Publication number: 20110163061Abstract: A stress-engineered microspring is formed generally in the plane of a substrate. A nanowire (or equivalently, a nanotube) is formed at the tip thereof, also in the plane of the substrate. Once formed, the length of the nanowire may be defined, for example photolithographically. A sacrificial layer underlying the microspring may then be removed, allowing the engineered stresses in the microspring to cause the structure to bend out of plane, elevating the nanowire off the substrate and out of plane. Use of the nanowire as a contact is thereby provided. The nanowire may be clamped at the tip of the microspring for added robustness. The nanowire may be coated during the formation process to provide additional functionality of the final device.Type: ApplicationFiled: March 10, 2011Publication date: July 7, 2011Applicant: PALO ALTO RESEARCH CENTER INCORPORATEDInventors: Eugene Chow, Pengfei Qi
-
Publication number: 20110122396Abstract: A photonic measurement system, such as an atomic absorption spectrometer, includes source, sample and detection modules that are interconnected by fiber optic cables. A first set of fiber optic cables guides light from one or more light sources in the source module to each of at least two analysis chambers in the sample module. A second set of fiber optic cables guides light from the analysis chambers to a detector in the detection module. The detector provides to a processing sub-system signals that correspond to intensities of the guided light. One analysis chamber is selected to perform a sample analysis at a given time, and the processing sub-system processes the signals associated with the selected analysis chamber as measurement signals. The processing sub-system may further process the signals associated with a given non-selected analysis chamber as reference signals.Type: ApplicationFiled: November 18, 2010Publication date: May 26, 2011Inventors: Juan C. Ivaldi, Paul L. St. Cyr, Eugene Chow, Mark C. Werner
-
Patent number: 7884361Abstract: A self-aligned, thin-film, top-gate transistor and method of manufacturing same are disclosed. A first print-patterned mask is formed over a metal layer by digital lithography, for example by printing with a phase change material using a droplet ejector. The metal layer is then etched using the first print-patterned mask to form source and drain electrodes. A semiconductive layer and an insulative layer are formed thereover. A layer of photosensitive material is then deposited and exposed through the substrate, with the source and drain electrodes acting as masks for the exposure. Following development of the photosensitive material, a gate metal layer is deposited. A second print-patterned mask is then formed over the device, again by digital lithography. Etching and removal of the photosensitive material leaves the self-aligned top-gate electrode.Type: GrantFiled: June 16, 2010Date of Patent: February 8, 2011Assignee: Palo Alto Research Center IncorporatedInventors: William Wong, Rene Lujan, Eugene Chow
-
Patent number: 7804090Abstract: A self-aligned, thin-film, top-gate transistor and method of manufacturing same are disclosed. A first print-patterned mask is formed over a metal layer by digital lithography, for example by printing with a phase change material using a droplet ejector. The metal layer is then etched using the first print-patterned mask to form source and drain electrodes. A semiconductive layer and an insulative layer are formed thereover. A layer of photosensitive material is then deposited and exposed through the substrate, with the source and drain electrodes acting as masks for the exposure. Following development of the photosensitive material, a gate metal layer is deposited. A second print-patterned mask is then formed over the device, again by digital lithography. Etching and removal of the photosensitive material leaves the self-aligned top-gate electrode.Type: GrantFiled: January 23, 2008Date of Patent: September 28, 2010Assignee: Palo Alto Research Center IncorporatedInventors: William Wong, Rene Lujan, Eugene Chow
-
Publication number: 20090322845Abstract: An addressable imaging belt for use in printing applications having embedded anisotropically conductive addressable islands configured for electric contact on a first side of the belt by a write head consisting of an array of compliant cantilevered fingers with contact pads/points to which a voltage can be applied. The conductive addressable islands electrically isolated from one another and extending substantially through the thickness of the belt in order to allow charge to flow through the belt towards a second side of the belt, in order to form a latent electrostatic image on the second side and develop this latent image by attracting colorized toner or other electrically charged particles to the second side.Type: ApplicationFiled: June 25, 2008Publication date: December 31, 2009Applicant: Palo Alto Research Center IncorporatedInventors: Timothy D. Stowe, Chu-heng Liu, Jeng Ping Lu, Eugene Chow, Gregory B. Anderson, Armin Volkel, Eric Peeters
-
Publication number: 20090159996Abstract: A stress-engineered microspring is formed generally in the plane of a substrate. A nanowire (or equivalently, a nanotube) is formed at the tip thereof, also in the plane of the substrate. Once formed, the length of the nanowire may be defined, for example photolithographically. A sacrificial layer underlying the microspring may then be removed, allowing the engineered stresses in the microspring to cause the structure to bend out of plane, elevating the nanowire off the substrate and out of plane. Use of the nanowire as a contact is thereby provided. The nanowire may be clamped at the tip of the microspring for added robustness. The nanowire may be coated during the formation process to provide additional functionality of the final device.Type: ApplicationFiled: December 21, 2007Publication date: June 25, 2009Applicant: PALO ALTO RESEARCH CENTER INCORPORATEDInventors: Eugene Chow, Pengfei Qi
-
Publication number: 20080089705Abstract: Xerographic micro-assembler systems and methods are disclosed. The systems and methods involve manipulating charge-encoded micro-objects. The charge encoding identifies each micro-object and specifies its orientation for sorting. The micro-objects are sorted in a sorting unit so that they have defined positions and orientations. The sorting unit has the capability of electrostatically and magnetically manipulating the micro-objects based on their select charge encoding. The sorted micro-objects are provided to an image transfer unit. The image transfer unit is adapted to receive the sorted micro-objects, maintain them in their sorted order and orientation, and deliver them to a substrate. Maintaining the sorted order as the micro-objects are delivered to the substrate may be accomplished through the use of an electrostatic image, as is done in xerography.Type: ApplicationFiled: December 18, 2007Publication date: April 17, 2008Applicant: PALO ALTO RESEARCH CENTER INCORPORATEDInventors: Jeng Ping Lu, Eugene Chow
-
Publication number: 20070221610Abstract: A method to pattern films into dimensions smaller than the printed pixel mask size. A printed mask is deposited on a thin film on a substrate. The second mask layer is selectively deposited onto the film, but not to the printed mask. A third mask is then printed onto the substrate to pattern a portion of the second mask. Certain solvents are then used to remove the printed mask but not the mask layer on the thin film. The mask layer is then used to form a pattern on the thin film in combination with etching. The features formed in the thin film are smaller than the smallest dimension of the printed mask. The coated mask layer can be a self-assembled mono-layer or other material that selectively binds to the thin film.Type: ApplicationFiled: March 24, 2006Publication date: September 27, 2007Inventors: Eugene Chow, William Wong, Michael Chabinyc, Jeng Lu, Ana Arias
-
Publication number: 20070221611Abstract: A process for fabricating fine features such as small gate electrodes on a transistor. The process involves the jet-printing of a mask and the plating of a metal to fabricate sub-pixel and standard pixel size features in one layer. Printing creates a small sub-pixel size gap mask for plating a fine feature. A second printed mask may be used to protect the newly formed gate and etch standard pixel size lines connecting the small gates.Type: ApplicationFiled: March 24, 2006Publication date: September 27, 2007Inventors: Eugene Chow, William Wong, Michael Chabinyc, Ana Arias
-
Publication number: 20070158816Abstract: A contact spring applicator is provided which includes an applicator substrate, a removable encapsulating layer and a plurality of contact springs embedded in the removable encapsulating layer. The contact springs are positioned such that a bond pad on each contact spring is adjacent to an upper surface of the removable encapsulating layer. The contact spring applicator may also include an applicator substrate, a release layer, a plurality of unreleased contact springs on the release layer and a bond pad at an anchor end of each contact spring. The contact spring applicators apply contact springs to an integrated circuit chip, die or package or to a probe card by aligning the bond pads with bond pad landings on the receiving device. The bond pads are adhered to the bond pad landings. The encapsulating or release layer is then removed to separate the contact springs from the contact spring applicator substrate.Type: ApplicationFiled: January 12, 2006Publication date: July 12, 2007Inventors: Eugene Chow, Christopher Chua, Eric Peeters
-
Publication number: 20070145523Abstract: Method for integrally forming high Q tunable capacitors and high Q inductors on a substrate are described. A variable capacitors may employ stops between a moveable electrode and a fixed electrode to reduce and/or prevent electrical shorting between the moveable and fixed electrode. A capacitor may employ a split bottom electrode structure to removing a suspension portion of a moveable top electrode from an RF part of a circuit.Type: ApplicationFiled: December 28, 2005Publication date: June 28, 2007Applicant: PALO ALTO RESEARCH CENTER INCORPORATEDInventors: Eugene Chow, Koenraad Schuylenbergh, David Fork, JengPing Lu
-
Publication number: 20070148895Abstract: Methods for integrally forming high Q tunable capacitors and high Q inductors on a substrate are described. A method for integrally forming a capacitor and a microcoil on a substrate may involve depositing and patterning a dielectric layer on the substrate, depositing and patterning a sacrificial layer on the substrate, depositing and patterning conductive material on the semiconductor substrate, depositing and patterning a polymer layer on the semiconductor substrate, removing an exposed portion of the conductive material exposed by the patterned polymer layer to release a portion of the conductive pattern from the semiconductor substrate to form out-of-plane windings of the microcoil, depositing second conductive material on exposed portions of the conductive material, and removing the sacrificial layer. The patterned conductive material may include a windings portion of the microcoil, an overlapping electrode portion of the capacitor and a support portion for the electrode of the capacitor.Type: ApplicationFiled: December 28, 2005Publication date: June 28, 2007Applicant: PALO ALTO RESEARCH CENTER INCORPORATEDInventors: Koenraad Van Schuylenbergh, Eugene Chow, JengPing Lu
-
Publication number: 20070139150Abstract: A method of reflowing a polymer to form a spring or coil structure is described. A polymer is deposited over stress engineered thin film with an internal stress gradient. The polymer serves as a loading prevent release of the internal stress until a solvent vapor softens and reflows the polymer. As the polymer softens, the internal stress within the thin film is gradually released allowing controlled curling of the thin film out of a substrate plane. In one embodiment, the thin film forms the windings of a coil structure.Type: ApplicationFiled: December 15, 2005Publication date: June 21, 2007Inventors: Eugene Chow, Christopher Chua, Koenraad Van Schuylenbergh