Patents by Inventor Eugene F. Neumann
Eugene F. Neumann has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 5400504Abstract: A completely shielded metallized connector block for use in multiple circuit modules of an electronic device. Electrical communication between the circuit boards is effected by an array of metallic pins which run through the blocks. The metallization on the nonconductive blocks can be held at ground or at a constant potential to increase the shielding between pins as well as maintaining voltage and ground planes at constant levels throughout the modules. The metallization is insulated from the pins and circuit boards by nonconductive bushings inserted in holes in the blocks. In one embodiment, the metallization consists of copper and solder plating and the blocks are constructed of liquid crystal polymer.Type: GrantFiled: May 17, 1993Date of Patent: March 28, 1995Assignee: Cray Research, Inc.Inventors: Eugene F. Neumann, Melvin C. August, Daniel C. Mansur, Albert H. Wilson
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Patent number: 5358826Abstract: A method for simultaneously manufacturing metallized carriers from wafer-shaped substrates is described, wherein such wafer-shaped substrates permit the use of standard IC fabrication apparatus and methods. As a result, very thin and finely dimensioned traces can be deposited. Thin-film manufacturing techniques are used to create the high-density traces on the surface of the chip carriers, thereby permitting direct connections from the IC to the periphery of the carrier without the need for vias. A lid hermetically seals and protects the package. The traces are comprised of a plurality of metals to facilitate bonding, each of the metals homogeneous for a portion of the trace. One metal portion of the trace is of a type compatible with an IC chip placed in the carrier. Another metal portion of the trace is of a type compatible with a trace on a printed circuit board. A metal barrier is interposed between the metals to prevent metal diffusion from one metal to an adjoining portion of another metal.Type: GrantFiled: May 8, 1992Date of Patent: October 25, 1994Assignee: Cray Research, Inc.Inventors: Richard R. Steitz, Diane M. Christie, Eugene F. Neumann, Melvin C. August, Stephen Nelson
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Patent number: 5258576Abstract: A generic chip carrier is described which includes, as integral parts, a voltage bus and a plurality of terminating resistors connected between the voltage bus and signal traces on the carrier. The voltage bus wraps around the chip carrier, thus providing a large area of metal. Through the selective use of the terminating resistors, the generic carrier can be customized for a particular type of integrated circuit, i.e., source or destination termination of signals. A signal trace may be customized by "opening" the terminating resistor with a current spike applied by a standard electrical probe. Spare bonding pads and terminating resistors are placed at intervals about the periphery of the carrier as insurance against defective or mistakenly removed terminating resistors.Type: GrantFiled: January 3, 1992Date of Patent: November 2, 1993Assignee: Cray Research, Inc.Inventors: Eugene F. Neumann, Melvin C. August, James N. Kruchowski, Stephen Nelson, Richard R. Steitz
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Patent number: 5224918Abstract: A completely shielded metallic connector block for use in multiple circuit modules of an electronic device. Electrical communication between the circuit boards is effected by an array of metallic pins which run through the blocks. The metal of the blocks can be held at ground or at a constant potential to increase the shielding between pins as well as maintaining voltage and ground planes at constant levels throughout the modules. The blocks are insulated from the pins and circuit boards by a non-conductive coating. In the preferred embodiment, the metal of the blocks is aluminum and the coating is a hardcoat anodizing.Type: GrantFiled: October 20, 1992Date of Patent: July 6, 1993Assignee: Cray Research, Inc.Inventors: Eugene F. Neumann, Melvin C. August, Daniel C. Mansur, Richard J. Kelley
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Patent number: 5211567Abstract: A completely shielded metallized connector block for use in multiple circuit modules of an electronic device. Electrical communication between the circuit boards is effected by an array of metallic pins which run through the blocks. The metallization on the nonconductive blocks can be held at ground or at a constant potential to increase the shielding between pins as well as maintaining voltage and ground planes at constant levels throughout the modules. The metallization is insulated from the pins and circuit boards by nonconductive bushings inserted in holes in the blocks. In one embodiment, the metallization consists of copper and solder plating and the blocks are constructed of liquid crystal polymer.Type: GrantFiled: July 2, 1991Date of Patent: May 18, 1993Assignee: Cray Research, Inc.Inventors: Eugene F. Neumann, Melvin C. August, Stephen A. Bowen, Gregory W. Pautsch
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Patent number: 5182420Abstract: A method for simultaneously manufacturing metallized carriers from wafer-shaped substrates is described, wherein such wafer-shaped substrates permit the use of standard IC fabrication apparatus and methods. As a result, very thin and finely dimensioned traces can be deposited. Thin-film manufacturing techniques are used to create the high-density traces on the surface of the chip carriers, thereby permitting direct connections from the IC to the periphery of the carrier without the need for vias. A lid hermetically seals and protects the package. The traces are comprised of a plurality of metals to facilitate bonding, each of the metals homogeneous for a portion of the trace. One metal portion of the trace is of a type compatible with an IC chip placed in the carrier. Another metal portion of the trace is of a type compatible with a trace on a printed circuit board. A metal barrier is interposed between the metals to prevent metal diffusion from one metal to an adjoining portion of another metal.Type: GrantFiled: April 9, 1990Date of Patent: January 26, 1993Assignee: Cray Research, Inc.Inventors: Richard R. Steitz, Diane M. Christie, Eugene F. Neumann, Melvin C. August, Stephen Nelson
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Patent number: 5178549Abstract: A completely shielded metallic connector block for use in multiple circuit modules of an electronic device. Electrical communication between the circuit boards is effected by an array of metallic pins which run through the blocks. The metal of the blocks can be held at ground or at a constant potential to increase the shielding between pins as well as maintaining voltage and ground planes at constant levels throughout the modules. The blocks are insulated from the pins and circuit boards by a non-conductive coating. In the preferred embodiment, the metal of the blocks is aluminum and the coating is a hardcoat anodizing.Type: GrantFiled: June 27, 1991Date of Patent: January 12, 1993Assignee: Cray Research, Inc.Inventors: Eugene F. Neumann, Melvin C. August, Daniel C. Mansur, Richard J. Kelley
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Patent number: 5144691Abstract: An optical backplane interconnects logic assemblies in a computer system using optical fibers. The logic assembly is connected to a laser or LED for converting electrical signals from the logic assembly into the equivalent optical signals. The optical signals are transmitted along the optical fibers to another logic assembly. The optical backplane comprises a mainframe rail for mounting to one end of the logic assembly, a connector attached to the mainframe rail, and an optical coupler mated with the connector. The optical coupler and connector having matching vee grooves for supporting and aligning the optical fibers.Type: GrantFiled: July 20, 1990Date of Patent: September 1, 1992Assignee: Cray Research, Inc.Inventors: Melvin C. August, Daniel Massopust, Mary Nebel, Eugene F. Neumann, Gregory W. Pautsch
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Patent number: 5127570Abstract: A flexible automated bonding apparatus electrically interconnects integrated circuit carriers, printed circuit boards, and other devices. A metallized interconnect pattern is deposited on the surface of the substrate. The metallized interconnects in the pattern span apertures created in the substrate using an excimer laser. Thus, the metallized interconnects can be electrically bonded through the apertures to elements lying underneath the substrate.Type: GrantFiled: June 28, 1990Date of Patent: July 7, 1992Assignee: Cray Research, Inc.Inventors: Richard R. Steitz, Melvin C. August, Diane M. Christie, Deanna M. Dowdle, Dean B. Dudley, Stephen E. Nelson, Eugene F. Neumann, Paul E. Schroeder
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Patent number: 5123848Abstract: An electrical backplane makes high density electrical connections with logic boards in a computer system. The electrical backplane is comprised of an assembly pressure connector and a connector interconnect board that connects the logic boards to external wiring. The assembly pressure connector has electrical contact bumps on its surfaces for making electrical connections with contact points on the surface of the logic boards. The assembly pressure connector prevents the permanent deformation of its electrical contact bumps by using resilient bumps. The resilient bumps are formed from the end portions of interconnecting wires extending through the assembly pressure connector. The interconnecting wires are bent in the shape of a leaf spring. Thus, the wires are compressed within the elastic range of their composing material and are not permanently deformed by the force applied to the assembly pressure connector.Type: GrantFiled: July 20, 1990Date of Patent: June 23, 1992Assignee: Cray Research, Inc.Inventors: Melvin C. August, Daniel Massopust, Mary Nebel, Eugene F. Neumann, Gregory Pautsch
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Patent number: 5122620Abstract: A generic chip carrier is described which includes, as integral parts, a voltage bus and a plurality of terminating resistors connected between the voltage bus and signal traces on the carrier. The voltage bus wraps around the chip carrier, thus providing a large area of metal. Through the selective use of the terminating resistors, the generic carrier can be customized for a particular type of integrated circuit, i.e., source or destination termination of signals. A signal trace may be customized by "operating" the terminating resistor with a current spike applied by a standard electrical probe. Spare bonding pads and terminating resistors are placed at intervals about the periphery of the carrier as insurance against defective or mistakenly removed terminating resistors.Type: GrantFiled: June 25, 1991Date of Patent: June 16, 1992Assignee: Cray Research Inc.Inventors: Eugene F. Neumann, Melvin C. August, James N. Kruchowski, Stephen Nelson, Richard R. Steitz
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Patent number: 4984993Abstract: An electrical end connector (10) of the zero insertion force type includes a pair of opposing blocks (21, 40), one of which blocks is slideably mounted in a housing (22). Opposite corresponding pairs of female receptacles (34) and male pins (31) are cooperatively mounted on the opposing blocks (21, 40). The housig (22) has two sets of oppositely disposed windows formed through the longitudinal ends. One block (40) has a channel formed therethrough, such that the block (40) is urged transversely upon insertion of a cam-like slider device (70), thereby selectively engaging or disengaging the male pins (31) and female receptacles (43).Type: GrantFiled: May 12, 1989Date of Patent: January 15, 1991Assignee: Cray Research, Inc.Inventors: Eugene F. Neumann, Melvin C. August, Stephen A. Bowen
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Patent number: 4949453Abstract: A generic chip carrier is described which includes, as integral parts, a voltage bus and a plurality of terminating resistors connected between the voltage bus and signal traces on the carrier. The voltage bus wraps around the chip carrier, thus providing a large area of metal. Through the selective use of the terminating resistors, the generic carrier can be customized for a particular type of integrated circuit, i.e., source or destination termination of signals. A signal trace may be customized by "opening" the terminating resistor with a current spike applied by a standard electrical probe. Spare bonding pads and terminating resistors are placed at intervals about the periphery of the carrier as insurance against defective or mistakenly removed terminating resistors.Type: GrantFiled: June 15, 1989Date of Patent: August 21, 1990Assignee: Cray Research, Inc.Inventors: Eugene F. Neumann, Melvin C. August, James N. Kruchowski, Stephen Nelson, Richard R. Steitz
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Patent number: 4939624Abstract: An improved multiple circuit module for use in an electronic device includes a number of cold plates sandwiched between pairs of circuit boards for taking away excess heat from the circuit boards. Each plate is provided with open spaces which permit communication between the circuit boards, and with circuit boards on other cold plates. Electrical communication between the circuit boards is effected by an array of metallic pins. The pins are received in a perforate pin header which extends along the depth of the cold plate, and pins communicating with other circuit boards extend into a connector block which is placed between a pair of pin headers. Shielding is provided in both the connector blocks and pin headers to prevent electronic cross-talk between pins disposed therein. In one embodiment, a novel type of pin which reduces installation and disconnection friction is utilized.Type: GrantFiled: December 14, 1988Date of Patent: July 3, 1990Assignee: Cray Research, Inc.Inventors: Melvin C. August, Eugene F. Neumann, Stephen A. Bowen, John T. Williams
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Patent number: 4911645Abstract: The present invention provides a parallel board connector having zero insertion force between a PC board and a backplane which presents effectively zero impedance change through the connector interface. The PC board and the backplane to which it is to be connected have through-plated holes. The boards are positioned to overlap such that the through-plated holes are axially aligned. A shuttle block is provided with a number of parallel dual flex pins attached to one surface. To effect connection, the flex pins of the shuttle block are inserted through the holes of one board and into the holes of a second board to provide an electrical connection having very low or no impedance interface.Type: GrantFiled: December 14, 1988Date of Patent: March 27, 1990Assignee: Cray Research, Inc.Inventors: Melvin C. August, Eugene F. Neumann
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Patent number: 4884168Abstract: A cooling plate for heat dissipation is particularly adapted for use within printed circuit board stacks. The cooling plate includes a fluid inlet manifold, fluid pass containing a plurality of heat dissipation fins, and a fluid outlet manifold. Externally, the cooling plate has a pattern of heat conductive pads that is substantially identical to the pattern of devices on a printed circuit board attached to the cooling plate. The cooling plate includes apertures and mounting elements for z-axis connector assemblies so that printed circuit boards attached to either side of the cooling plate may electrically interconnect.Type: GrantFiled: December 14, 1988Date of Patent: November 28, 1989Assignee: Cray Research, Inc.Inventors: Melvin C. August, Eugene F. Neumann, Stephen A. Bowen, John T. Williams
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Patent number: 4859188Abstract: An apparatus and method for creating a stack assembly of print circuit boards and for providing electrical interconnection between the individual through-plated hole pads of the circuit boards is described. The preferred embodiment of the present invention is a device comprised of two parts: a slotted disk and a wire. The slotted disk is attached to the surface of the printed circuit board so as to cover a hole pad and form an electrical connection therewith. The covered holes of the printed circuit board are axially aligned between circuit boards and an electrically conducting wire is inserted through the slotted disks on the circuit boards to form an electrical connection therewith.Type: GrantFiled: February 3, 1989Date of Patent: August 22, 1989Assignee: Cray Research, Inc.Inventor: Eugene F. Neumann
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Patent number: H1153Abstract: A hermetically sealed carrier for integrated circuits has an IC placed on a carrier substrate, and an electrical lead apparatus, comprised of a highly heat resistant substrate with a metallized interconnect pattern deposited thereon, connected to the IC and brought out across and over the edges of the carrier substrate to facilitate electrical connection to a circuit board. A lid is provided which is placed over the IC. A low-melting temperature adhesive means is then placed on the lid-to-carrier interface and is exposed to heat hermetically sealing the IC. A hermetically sealed carrier including a single silicon die which includes both an active region where an integrated circuit may be fabricated and an inactive region is also provided. Electrical leads are electrically interconnected to the IC of the active region and extend to the periphery of the inactive region of the silicon die. A lid and adhesive means is provided for hermetically sealing the IC of the active region.Type: GrantFiled: January 28, 1991Date of Patent: March 2, 1993Inventors: Melvin C. August, Diane M. Christie, Arthur J. Hebert, Eugene F. Neumann, Richard R. Steitz
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Patent number: RE34395Abstract: A generic chip carrier is described which includes, as integral parts, a voltage bus and a plurality of terminating resistors connected between the voltage bus and signal traces on the carrier. The voltage bus wraps around the chip carrier, thus providing a large area of metal. Through the selective use of the terminating resistors, the generic carrier can be customized for a particular type of integrated circuit, i.e., source or destination termination of signals. A signal trace may be customized by "opening" the terminating resistor with a current spike applied by a standard electrical probe. Spare bonding pads and terminating resistors are placed at intervals about the periphery of the carrier as insurance against defective or mistakenly removed terminating resistors.Type: GrantFiled: December 11, 1991Date of Patent: October 5, 1993Assignee: Cray Research, Inc.Inventors: Eugene F. Neumann, Melvin C. August, James N. Kruchowski, Stephen Nelson, Richard R. Steitz