Patents by Inventor Eugene Greenstein

Eugene Greenstein has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Integrated circuit process compatible surge protection resistor
    Patent number: 4167804
    Abstract: A monolithic integrated circuit structure having an integral high value surge protection resistor of polycrystalline silicon on a thermally grown thick silicon dioxide plateau having no surface diffusion regions thereunder. The structure can be made by merely adding intermediate steps to existing integrated circuit processing. It is capable of absorbing transients of hundreds of volts.
    Type: Grant
    Filed: August 23, 1978
    Date of Patent: September 18, 1979
    Assignee: General Motors Corporation
    Inventor: Eugene Greenstein
  • Method of low dose phoshorus implantation for oxide passivated diodes in <10> P-type silicon
    Patent number: 4144100
    Abstract: Low dosage phosphorus implantation regions in <100> P-type silicon are subjected to a severe damage implant with halogen or silicon ions, preferably fluorine and chlorine. This permits anneal in a strongly oxidizing atmosphere for PN junction passivation, without concurrently inducing PN junction leakage. Oxide passivated PN junctions are formed having leakages as low as when the low dose phosphorus implants are annealed in other atmospheres, or are formed in <111> silicon.
    Type: Grant
    Filed: December 2, 1977
    Date of Patent: March 13, 1979
    Assignee: General Motors Corporation
    Inventors: Bernard A. MacIver, Eugene Greenstein
  • Method of forming diodes by amorphous implantations and concurrent annealing, monocrystalline reconversion and oxide passivation in <100> N-type silicon
    Patent number: 4133704
    Abstract: Boron implantation regions in <100> N-type silicon are subjected to a severe damage implant before anneal in a strongly oxidizing atmosphere that provides a passivating silicon dioxide surface layer. Diodes are formed having leakages as low as when such regions are annealed in other atmospheres or are formed in <111> silicon. In a preferred example, BF.sub.2.sup.+ is used to simultaneously implant boron into a region and convert it to amorphous silicon.
    Type: Grant
    Filed: January 17, 1977
    Date of Patent: January 9, 1979
    Assignee: General Motors Corporation
    Inventors: Bernard A. MacIver, Eugene Greenstein
  • Selective enhancement of phosphorus diffusion by implanting halogen ions
    Patent number: 4133701
    Abstract: An improved method of making bipolar monolithic integrated circuits by successive diffusions of boron and phosphorus. Selective halogen ion implantation is used to locally specifically enhance phosphorus diffusion. The halogen implant is performed prior to the boron diffusion. Enhanced local phosphorus diffusion provides selected transistors in the circuit with a narrower base width than others, and a corresponding higher current gain than others. Analogously, higher value pinch resistors can be selectively produced in the circuit.
    Type: Grant
    Filed: June 29, 1977
    Date of Patent: January 9, 1979
    Assignee: General Motors Corporation
    Inventors: Eugene Greenstein, Bernard A. MacIver
  • Integrated circuit process compatible surge protection resistor
    Patent number: 4133000
    Abstract: A monolithic integrated circuit structure having an integral high value surge protection resistor of polycrystalline silicon on a thermally grown thick silicon dioxide plateau having no surface diffusion regions thereunder. The structure can be made by merely adding intermediate steps to existing integrated circuit processing. It is capable of absorbing transients of hundreds of volts.
    Type: Grant
    Filed: December 13, 1976
    Date of Patent: January 2, 1979
    Assignee: General Motors Corporation
    Inventor: Eugene Greenstein