Patents by Inventor Eugene Joseph Annunziata

Eugene Joseph Annunziata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 3964054
    Abstract: A response priority circuit arrangement for determining the priority among simultaneous responses from different access-time levels L3 and L2 in a storage hierarchy to maintain nearly the same order among the simultaneous responses as the order of their storage access requests.The storage requests were put into an indexed slot in a hardware queue. The index of the assigned queue slot is sent to a basic storage module (BSM) part of the hierarchy which is selected by the storage address supplied by the processor making the storage request. The selected BSM will have the requested data either in its main memory part (L3) or in its high-speed buffer part (L2).The priority circuit arrangement has a separate group of AND gates for each hierarchy level L3 and L2. The groups are interlocked by a circuit which disables the L2 group if any AND gate is enabled in the L3 group. Only one AND gate can be enabled in both L3 and L2 groups.
    Type: Grant
    Filed: June 23, 1975
    Date of Patent: June 15, 1976
    Assignee: International Business Machines Corporation
    Inventors: Eugene Joseph Annunziata, Neal Taylor Christensen