Abstract: A simple format is disclosed and referred to as Elementary Network Description (END). The format can fully describe a large-scale neuronal model and embodiments of software or hardware engines to simulate such a model efficiently. The architecture of such neuromorphic engines is optimal for high-performance parallel processing of spiking networks with spike-timing dependent plasticity. Methods for managing memory in a processing system are described whereby memory can be allocated among a plurality of elements and rules configured for each element such that the parallel execution of the spiking networks is most optimal.

Abstract: Apparatus and methods for partial evaluation of synaptic updates in neural networks. In one embodiment, a pre-synaptic unit is connected to a several post synaptic units via communication channels. Information related to a plurality of post-synaptic pulses generated by the post-synaptic units is stored by the network in response to a system event. Synaptic channel updates are performed by the network using the time intervals between a pre-synaptic pulse, which is being generated prior to the system event, and at least a portion of the plurality of the post synaptic pulses. The system event enables removal of the information related to the portion of the post-synaptic pulses from the storage device. A shared memory block within the storage device is used to store data related to post-synaptic pulses generated by different post-synaptic nodes. This configuration enables memory use optimization of post-synaptic units with different firing rates.

Abstract: A simple format is disclosed and referred to as Elementary Network Description (END). The format can fully describe a large-scale neuronal model and embodiments of software or hardware engines to simulate such a model efficiently. The architecture of such neuromorphic engines is optimal for high-performance parallel processing of spiking networks with spike-timing dependent plasticity. Methods for managing memory in a processing system are described whereby memory can be allocated among a plurality of elements and rules configured for each element such that the parallel execution of the spiking networks is most optimal.

Abstract: A simple format is disclosed and referred to as Elementary Network Description (END). The format can fully describe a large-scale neuronal model and embodiments of software or hardware engines to simulate such a model efficiently. The architecture of such neuromorphic engines is optimal for high-performance parallel processing of spiking networks with spike-timing dependent plasticity. The software and hardware engines are optimized to take into account short-term and long-term synaptic plasticity in the form of LTD, LTP, and STDP.

Abstract: Apparatus and methods for high-level neuromorphic network description (HLND) using tags. The framework may be used to define nodes types, define node-to-node connection types, instantiate node instances for different node types, and/or generate instances of connection types between these nodes. The HLND format may be used to define nodes types, define node-to-node connection types, instantiate node instances for different node types, dynamically identify and/or select network subsets using tags, and/or generate instances of one or more connections between these nodes using such subsets. To facilitate the HLND operation and disambiguation, individual elements of the network (e.g., nodes, extensions, connections, I/O ports) may be assigned at least one unique tag. The tags may be used to identify and/or refer to respective network elements. The HLND kernel may comprises an interface to Elementary Network Description.

Abstract: A simple format is disclosed and referred to as Elementary Network Description (END). The format can fully describe a large-scale neuronal model and embodiments of software or hardware engines to simulate such a model efficiently. The architecture of such neuromorphic engines is optimal for high-performance parallel processing of spiking networks with spike-timing dependent plasticity. The format is specifically tuned for neural systems and specialized neuromorphic hardware, thereby serving as a bridge between developers of brain models and neuromorphic hardware manufactures.

Abstract: Apparatus and methods for learning and training in neural network-based devices. In one implementation, the devices each comprise multiple spiking neurons, configured to process sensory input. In one approach, alternate heterosynaptic plasticity mechanisms are used to enhance learning and field diversity within the devices. The selection of alternate plasticity rules is based on recent post-synaptic activity of neighboring neurons. Apparatus and methods for simplifying training of the devices are also disclosed, including a computer-based application. A data representation of the neural network may be imaged and transferred to another computational environment, effectively copying the brain. Techniques and architectures for achieve this training, storing, and distributing these data representations are also disclosed.

Abstract: Sensory input processing apparatus and methods useful for adaptive encoding and decoding of features. In one embodiment, the apparatus receives an input frame having a representation of the object feature, generates a sequence of sub-frames that are displaced from one another (and correspond to different areas within the frame), and encodes the sub-frame sequence into groups of pulses. The patterns of pulses are directed via transmission channels to detection apparatus configured to generate an output pulse upon detecting a predetermined pattern within received groups of pulses that is associated with the feature. Upon detecting a particular pattern, the detection apparatus provides feedback to the displacement module in order to optimize sub-frame displacement for detecting the feature of interest.

Abstract: Systems and methods for processing image signals are described. One method comprises obtaining a generator signal based on an image signal and determining relative latencies associated with two or more pulses in a pulsed signal using a function of the generator signal that can comprise a logarithmic function. The function of the generator signal can be the absolute value of its argument. Information can be encoded in the pattern of relative latencies. Latencies can be determined using a scaling parameter that is calculated from a history of the image signal. The pulsed signal is typically received from a plurality of channels and the scaling parameter corresponds to at least one of the channels. The scaling parameter may be adaptively calculated such that the latency of the next pulse falls within one or more of a desired interval and an optimal interval.

Abstract: Apparatus and methods for high-level neuromorphic network description (HLND) framework that may be configured to enable users to define neuromorphic network architectures using a unified and unambiguous representation that is both human-readable and machine-interpretable. The framework may be used to define nodes types, node-to-node connection types, instantiate node instances for different node types, and to generate instances of connection types between these nodes. To facilitate framework usage, the HLND format may provide the flexibility required by computational neuroscientists and, at the same time, provides a user-friendly interface for users with limited experience in modeling neurons. The HLND kernel may comprise an interface to Elementary Network Description (END) that is optimized for efficient representation of neuronal systems in hardware-independent manner and enables seamless translation of HLND model description into hardware instructions for execution by various processing modules.

Abstract: Systems and methods for processing image signals are described. One method comprises obtaining a generator signal based on an image signal and determining relative latencies associated with two or more pulses in a pulsed signal using a function of the generator signal that can comprise a logarithmic function. The function of the generator signal can be the absolute value of its argument. Information can be encoded in the pattern of relative latencies. Latencies can be determined using a scaling parameter that is calculated from a history of the image signal. The pulsed signal is typically received from a plurality of channels and the scaling parameter corresponds to at least one of the channels. The scaling parameter may be adaptively calculated such that the latency of the next pulse falls within one or more of a desired interval and an optimal interval.

Abstract: Apparatus and methods for high-level neuromorphic network description (HLND) using tags. The framework may be used to define nodes types, define node-to-node connection types, instantiate node instances for different node types, and/or generate instances of connection types between these nodes. The HLND format may be used to define nodes types, define node-to-node connection types, instantiate node instances for different node types, dynamically identify and/or select network subsets using tags, and/or generate instances of one or more connections between these nodes using such subsets. To facilitate the HLND operation and disambiguation, individual elements of the network (e.g., nodes, extensions, connections, I/O ports) may be assigned at least one unique tag. The tags may be used to identify and/or refer to respective network elements. The HLND kernel may comprises an interface to Elementary Network Description.

Abstract: A simple format is disclosed and referred to as Elementary Network Description (END). The format can fully describe a large-scale neuronal model and embodiments of software or hardware engines to simulate such a model efficiently. The architecture of such neuromorphic engines is optimal for high-performance parallel processing of spiking networks with spike-timing dependent plasticity. Methods for managing memory in a processing system are described whereby memory can be allocated among a plurality of elements and rules configured for each element such that the parallel execution of the spiking networks is most optimal.

Abstract: Apparatus and methods for efficient synaptic update in a network such as a spiking neural network. In one embodiment, the post-synaptic updates, in response to generation of a post-synaptic pulse by a post-synaptic unit, are delayed until a subsequent pre-synaptic pulse is received by the unit. Pre-synaptic updates are performed first following by the post-synaptic update, thus ensuring synaptic connection status is up-to-date. The delay update mechanism is used in conjunction with system “flush” events in order to ensure accurate network operation, and prevent loss of information under a variety of pre-synaptic and post-synaptic unit firing rates. A large network partition mechanism is used in one variant with network processing apparatus in order to enable processing of network signals in a limited functionality embedded hardware environment.

Abstract: A simple format is disclosed and referred to as Elementary Network Description (END). The format can fully describe a large-scale neuronal model and embodiments of software or hardware engines to simulate such a model efficiently. The architecture of such neuromorphic engines is optimal for high-performance parallel processing of spiking networks with spike-timing dependent plasticity. Neuronal network and methods for operating neuronal networks comprise a plurality of units, where each unit has a memory and a plurality of doublets, each doublet being connected to a pair of the plurality of units. Execution of unit update rules for the plurality of units is order-independent and execution of doublet event rules for the plurality of doublets is order-independent.

Abstract: A simple format is disclosed and referred to as Elementary Network Description (END). The format can fully describe a large-scale neuronal model and embodiments of software or hardware engines to simulate such a model efficiently. The architecture of such neuromorphic engines is optimal for high-performance parallel processing of spiking networks with spike-timing dependent plasticity. The software and hardware engines are optimized to take into account short-term and long-term synaptic plasticity in the form of LTD, LTP, and STDP.

Abstract: Apparatus and methods for partial evaluation of synaptic updates in neural networks. In one embodiment, a pre-synaptic unit is connected to a several post synaptic units via communication channels. Information related to a plurality of post-synaptic pulses generated by the post-synaptic units is stored by the network in response to a system event. Synaptic channel updates are performed by the network using the time intervals between a pre-synaptic pulse, which is being generated prior to the system event, and at least a portion of the plurality of the post synaptic pulses. The system event enables removal of the information related to the portion of the post-synaptic pulses from the storage device. A shared memory block within the storage device is used to store data related to post-synaptic pulses generated by different post-synaptic nodes. This configuration enables memory use optimization of post-synaptic units with different firing rates.

Abstract: A simple format is disclosed and referred to as Elementary Network Description (END). The format can fully describe a large-scale neuronal model and embodiments of software or hardware engines to simulate such a model efficiently. The architecture of such neuromorphic engines is optimal for high-performance parallel processing of spiking networks with spike-timing dependent plasticity. The format is specifically tuned for neural systems and specialized neuromorphic hardware, thereby serving as a bridge between developers of brain models and neuromorphic hardware manufactures.

Abstract: System and methods for managing collaborative content resources, such as blogs, collaborative portals, and encyclopedias. In one embodiment, the collaborative resources comprise so-called “wikis” managed within an encyclopedia environment comprising a group of curators. The curators sponsor, peer-review, and accept or reject articles written by experts. When an article is accepted, the senior author joins the group of curators. Each accepted article has a curator and a group of assistant curators. When a registered user modifies the article, the modification is not shown to the public until it is approved by the curator or at least one assistant curator of the article. Upon approval, the user joins the group of assistant curators of the article. Each user has a rank, which in one variant reflects the number of times the approval or rejection decision by the user coincided with the approval or rejection decision by the curator.

Abstract: Object recognition apparatus and methods useful for extracting information from sensory input. In one embodiment, the input signal is representative of an element of an image, and the extracted information is encoded in a pulsed output signal. The information is encoded in one variant as a pattern of pulse latencies relative to an occurrence of a temporal event; e.g., the appearance of a new visual frame or movement of the image. The pattern of pulses advantageously is substantially insensitive to such image parameters as size, position, and orientation, so the image identity can be readily decoded. The size, position, and rotation affect the timing of occurrence of the pattern relative to the event; hence, changing the image size or position will not change the pattern of relative pulse latencies but will shift it in time, e.g., will advance or delay its occurrence.