Patents by Inventor Eugene Sy

Eugene Sy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8565121
    Abstract: Techniques for improved low latency frequency switching are disclosed. In one embodiment, a controller receives a frequency switch command and generates a frequency switch signal at a time determined in accordance with a system timer. In another embodiment, gain calibration is initiated subsequent to the frequency switch signal delayed by the expected frequency synthesizer settling time. In yet another embodiment, DC cancellation control and gain control are iterated to perform gain calibration, with signaling to control the iterations without need for processor intervention. Various other embodiments are also presented. Aspects of the embodiments disclosed may yield the benefit of reducing latency during frequency switching, allowing for increased measurements at alternate frequencies, reduced time spent on alternate frequencies, and the capacity and throughput improvements that follow from minimization of disruption of an active communication session and improved neighbor selection.
    Type: Grant
    Filed: October 25, 2007
    Date of Patent: October 22, 2013
    Assignee: QUALCOMM, Incorporated
    Inventors: Da-shan Shiu, Li Zhang, Eugene Sy, David Malonado, Upkar Dhaliwal
  • Publication number: 20080212553
    Abstract: Techniques for improved low latency frequency switching are disclosed. In one embodiment, a controller receives a frequency switch command and generates a frequency switch signal at a time determined in accordance with a system timer. In another embodiment, gain calibration is initiated subsequent to the frequency switch signal delayed by the expected frequency synthesizer settling time. In yet another embodiment, DC cancellation control and gain control are iterated to perform gain calibration, with signaling to control the iterations without need for processor intervention. Various other embodiments are also presented. Aspects of the embodiments disclosed may yield the benefit of reducing latency during frequency switching, allowing for increased measurements at alternate frequencies, reduced time spent on alternate frequencies, and the capacity and throughput improvements that follow from minimization of disruption of an active communication session and improved neighbor selection.
    Type: Application
    Filed: October 25, 2007
    Publication date: September 4, 2008
    Applicant: QUALCOMM Incorporated
    Inventors: Da-shan Shiu, Li Zhang, Eugene Sy, David Malonado, Upkar Dhaliwal
  • Patent number: 7307480
    Abstract: Techniques for improved low latency frequency switching are disclosed. In one embodiment, a controller receives a frequency switch command and generates a frequency switch signal at a time determined in accordance with a system timer. In another embodiment, gain calibration is initiated subsequent to the frequency switch signal delayed by the expected frequency synthesizer settling time. In yet another embodiment, DC cancellation control and gain control are iterated to perform gain calibration, with signaling to control the iterations without need for processor intervention. Various other embodiments are also presented. Aspects of the embodiments disclosed may yield the benefit of reducing latency during frequency switching, allowing for increased measurements at alternate frequencies, reduced time spent on alternate frequencies, and the capacity and throughput improvements that follow from minimization of disruption of an active communication session and improved neighbor selection.
    Type: Grant
    Filed: April 24, 2003
    Date of Patent: December 11, 2007
    Assignee: QUALCOMM Incorporated
    Inventors: Da-shan Shiu, Li Zhang, Eugene Sy
  • Publication number: 20040087292
    Abstract: Techniques for improved low latency frequency switching are disclosed. In one embodiment, a controller receives a frequency switch command and generates a frequency switch signal at a time determined in accordance with a system timer. In another embodiment, gain calibration is initiated subsequent to the frequency switch signal delayed by the expected frequency synthesizer settling time. In yet another embodiment, DC cancellation control and gain control are iterated to perform gain calibration, with signaling to control the iterations without need for processor intervention. Various other embodiments are also presented. Aspects of the embodiments disclosed may yield the benefit of reducing latency during frequency switching, allowing for increased measurements at alternate frequencies, reduced time spent on alternate frequencies, and the capacity and throughput improvements that follow from minimization of disruption of an active communication session and improved neighbor selection.
    Type: Application
    Filed: April 24, 2003
    Publication date: May 6, 2004
    Inventors: Da-shan Shiu, Li Zhang, Eugene Sy