Abstract: A system includes a multi-conductor bus, a master device coupled to the multi-conductor bus, and at least one slave device coupled to the multi-conductor bus. The multi-conductor bus has a clock line and a data line. The master device is arranged to transmit an address configuration sequence, and the at least one slave device is arranged to configurably determine its own address based on at least one portion of the address configuration sequence. The at least one slave device has a physical address configuration input coupled to either a fixed voltage potential or a changing voltage potential. The at least one slave device is arranged with a first address during a pre-initialization state and arranged with a second address during a post-initialization state.

Abstract: A system includes a multi-conductor bus, a master device coupled to the multi-conductor bus, and at least one slave device coupled to the multi-conductor bus. The multi-conductor bus has a clock line and a data line. The master device is arranged to transmit an address configuration sequence, and the at least one slave device is arranged to configurably determine its own address based on at least one portion of the address configuration sequence. The at least one slave device has a physical address configuration input coupled to either a fixed voltage potential or a changing voltage potential. The at least one slave device is arranged with a first address during a pre-initialization state and arranged with a second address during a post-initialization state.

Abstract: A system includes a multi-conductor bus, a master device coupled to the multi-conductor bus, and at least one slave device coupled to the multi-conductor bus. The multi-conductor bus has a clock line and a data line. The master device is arranged to transmit an address configuration sequence, and the at least one slave device is arranged to configurably determine its own address based on at least one portion of the address configuration sequence. The at least one slave device has a physical address configuration input coupled to either a fixed voltage potential or a changing voltage potential. The at least one slave device is arranged with a first address during a pre-initialization state and arranged with a second address during a post-initialization state.

Abstract: A system includes a multi-conductor bus, a master device coupled to the multi-conductor bus, and at least one slave device coupled to the multi-conductor bus. The multi-conductor bus has a clock line and a data line. The master device is arranged to transmit an address configuration sequence, and the at least one slave device is arranged to configurably determine its own address based on at least one portion of the address configuration sequence. The at least one slave device has a physical address configuration input coupled to either a fixed voltage potential or a changing voltage potential. The at least one slave device is arranged with a first address during a pre-initialization state and arranged with a second address during a post-initialization state.

Abstract: A processing circuit for a digital sensor, including: a control stage, which generates a control signal; a multiplexing stage, which may be electrically coupled to a plurality of sensing structures for receiving corresponding detection signals and generates a multiplexed signal, on the basis of one between the detection signals, as a function of the control signal; an analog-to-digital conversion stage, which is connected to the multiplexing stage and generates an encoded signal on the basis of the multiplexed signal; and an equalizer, which multiplies the encoded signal by a coefficient that depends upon the control signal.

Abstract: A multi-membrane microphone including an audio processing circuit is disclosed. The membranes are configured to output to a plurality of amplifiers a plurality of sensing signals in response to sound. The amplifiers in turn create amplified signals by amplifying the sensing signals and introduce a plurality of offsets into the amplified signals, respectively. The audio processing circuit includes a controller that sequentially measures the offset for each amplifier a corresponding membrane is inactive and stores the offset. The controller also compensates each amplified signal by the corresponding offset during operation of the multi-membrane microphone.

Abstract: A method and apparatus for mitigating offsets in an interpolator are disclosed. In the method and apparatus, a first number of clock cycles of a first clock signal observed over a first clock cycle of a second clock signal is determined and then stored. Also a second number of clock cycles of the first clock signal observed over a second clock cycle of the second clock signal subsequent to the first clock cycle is determined and stored. The first number of clock cycles and the second number of clock cycles are compared to determine whether they are different from each other. If they are different from each other, a reset signal is asserted under control of the second clock signal to reset at least one of a derivator stage and an integrator stage of an interpolator.

Abstract: A multi-membrane microphone including an audio processing circuit is disclosed. The membranes are configured to output to a plurality of amplifiers a plurality of sensing signals in response to sound. The amplifiers in turn create amplified signals by amplifying the sensing signals and introduce a plurality of offsets into the amplified signals, respectively. The audio processing circuit includes a controller that sequentially measures the offset for each amplifier a corresponding membrane is inactive and stores the offset. The controller also compensates each amplified signal by the corresponding offset during operation of the multi-membrane microphone.

Abstract: A DC-DC converter independently supplies electrical loads. For each load, an output load signal is compared to a reference to generate a result indicating a need to supply the respective electrical load. A first detection is made as to whether a first electrical load needs to be supplied and a second detection is made as to whether any remaining electrical loads need to be supplied. The first electrical load is supplied if the first detection is positive and the second detection is negative.

Abstract: A processing circuit for a digital sensor, including: a control stage, which generates a control signal; a multiplexing stage, which may be electrically coupled to a plurality of sensing structures for receiving corresponding detection signals and generates a multiplexed signal, on the basis of one between the detection signals, as a function of the control signal; an analog-to-digital conversion stage, which is connected to the multiplexing stage and generates an encoded signal on the basis of the multiplexed signal; and an equalizer, which multiplies the encoded signal by a coefficient that depends upon the control signal.

Abstract: An offset-compensation circuit in a MEMS sensor device, provided with a micromechanical detection structure that transduces a quantity to be detected into an electrical detection quantity, and with an electronic reading circuit, coupled to the micromechanical detection structure for processing the electrical detection quantity and supplying an output signal, which is a function of the quantity to be detected. A compensation structure is electrically coupled to the input of the electronic reading circuit and can be controlled for generating an electrical compensation quantity, of a trimmable value, for compensating an offset on the output signal; the compensation circuit has a control unit, which reads the output signal during operation of the MEMS sensor device; obtains information on the offset present on the output signal itself; and controls the compensation structure as a function of the offset information.

Abstract: A DC-DC converter independently supplies electrical loads. For each load, an output load signal is compared to a reference to generate a result indicating a need to supply the respective electrical load. A first detection is made as to whether a first electrical load needs to be supplied and a second detection is made as to whether any remaining electrical loads need to be supplied. The first electrical load is supplied if the first detection is positive and the second detection is negative.

Abstract: An offset-compensation circuit in a MEMS sensor device, provided with a micromechanical detection structure that transduces a quantity to be detected into an electrical detection quantity, and with an electronic reading circuit, coupled to the micromechanical detection structure for processing the electrical detection quantity and supplying an output signal, which is a function of the quantity to be detected. A compensation structure is electrically coupled to the input of the electronic reading circuit and can be controlled for generating an electrical compensation quantity, of a trimmable value, for compensating an offset on the output signal; the compensation circuit has a control unit, which reads the output signal during operation of the MEMS sensor device; obtains information on the offset present on the output signal itself; and controls the compensation structure as a function of the offset information.