Abstract: An organic light emitting display device includes: a substrate; a semiconductor on the substrate and including a switching channel of a switching transistor and a driving channel of a driving transistor, wherein the switching transistor and the driving transistor are spaced; a first insulating layer covering the semiconductor; a switching gate electrode on the first insulating layer and overlapped with the switching channel and a driving gate electrode on the first insulating layer and overlapped with the driving channel; a second insulating layer covering the switching gate electrode and the driving gate electrode; a data line on the second insulating layer and configured to transmit a data signal, a driving voltage line on the second insulating layer and configured to transmit a driving voltage; a passivation layer; a pixel electrode on the passivation layer; and a pixel connecting member on the passivation layer.

Abstract: An organic light emitting display device includes: a substrate; a semiconductor on the substrate and including a switching channel of a switching transistor and a driving channel of a driving transistor, wherein the switching transistor and the driving transistor are spaced; a first insulating layer covering the semiconductor; a switching gate electrode on the first insulating layer and overlapped with the switching channel and a driving gate electrode on the first insulating layer and overlapped with the driving channel; a second insulating layer covering the switching gate electrode and the driving gate electrode; a data line on the second insulating layer and configured to transmit a data signal, a driving voltage line on the second insulating layer and configured to transmit a driving voltage; a passivation layer; a pixel electrode on the passivation layer; and a pixel connecting member on the passivation layer.

Abstract: An organic light emitting display device includes: a substrate; a semiconductor on the substrate and including a switching channel of a switching transistor and a driving channel of a driving transistor, wherein the switching transistor and the driving transistor are spaced; a first insulating layer covering the semiconductor; a switching gate electrode on the first insulating layer and overlapped with the switching channel and a driving gate electrode on the first insulating layer and overlapped with the driving channel; a second insulating layer covering the switching gate electrode and the driving gate electrode; a data line on the second insulating layer and configured to transmit a data signal, a driving voltage line on the second insulating layer and configured to transmit a driving voltage; a passivation layer; a pixel electrode on the passivation layer; and a pixel connecting member on the passivation layer.

Abstract: An organic light emitting display device according to the present disclosure includes: a semiconductor on a substrate including a switching channel of a switching transistor and a driving channel of a driving transistor, the driving transistor being spaced from the switching transistor; a first insulating layer covering the semiconductor; a switching gate electrode on the first insulating layer and overlapping the switching channel and a driving gate electrode on the first gate insulating layer and overlapping the driving channel; a second insulating layer covering the switching gate electrode and the driving gate electrode; a data line on the second insulating layer comprising: an upper data line; and a lower data line; a driving voltage line on the second insulating layer; a passivation layer covering the data line and the driving voltage line; a pixel electrode on the passivation layer; and a first pixel connecting member on the passivation layer.

Abstract: An organic light emitting display device includes: a substrate; a semiconductor on the substrate and including a switching channel of a switching transistor and a driving channel of a driving transistor, wherein the switching transistor and the driving transistor are spaced; a first insulating layer covering the semiconductor; a switching gate electrode on the first insulating layer and overlapped with the switching channel and a driving gate electrode on the first insulating layer and overlapped with the driving channel; a second insulating layer covering the switching gate electrode and the driving gate electrode; a data line on the second insulating layer and configured to transmit a data signal, a driving voltage line on the second insulating layer and configured to transmit a driving voltage; a passivation layer; a pixel electrode on the passivation layer; and a pixel connecting member on the passivation layer.

Abstract: An organic light emitting display device according to the present disclosure includes: a semiconductor on a substrate including a switching channel of a switching transistor and a driving channel of a driving transistor, the driving transistor being spaced from the switching transistor; a first insulating layer covering the semiconductor; a switching gate electrode on the first insulating layer and overlapping the switching channel and a driving gate electrode on the first gate insulating layer and overlapping the driving channel; a second insulating layer covering the switching gate electrode and the driving gate electrode; a data line on the second insulating layer comprising: an upper data line; and a lower data line; a driving voltage line on the second insulating layer; a passivation layer covering the data line and the driving voltage line; a pixel electrode on the passivation layer; and a first pixel connecting member on the passivation layer.

Abstract: A display device includes a substrate, an insulation layer arranged on the substrate and spaced apart from the substrate and including a plurality of stepped portions recessed from a top surface, a first line arranged on the top surface of the insulation layer and a second line comprised of a same material as the first line and being arranged in the stepped portions and having a level difference from the first line.

Abstract: A method of fabricating a display device is provided. The method includes providing a substrate having a pixel region and a circuit region located at the periphery of the pixel region. A first semiconductor layer and a second semiconductor layer are formed on the pixel region and on the circuit region, respectively. The first semiconductor layer may be selectively surface treated to increase the density of lattice defects in a surface of the first semiconductor layer.

Abstract: A thin film transistor (TFT), including a crystalline semiconductor pattern on a substrate, a gate insulating layer on the crystalline semiconductor pattern, the gate insulating layer having two first source/drain contact holes and a semiconductor pattern access hole therein, a gate electrode on the gate insulating layer, the gate electrode being between the two first source/drain contact holes, an interlayer insulating layer covering the gate electrode, the interlayer insulating layer having two second source/drain contact holes therein, and source and drain electrodes on the interlayer insulating layer, each of the source and drain electrodes being insulated from the gate electrode, and having a portion connected to the crystalline semiconductor pattern through the first and second source/drain contact holes.

Abstract: Provided are an organic light emitting display device (OLED) and a method of fabricating the same. When a electrically conductive line and a gate electrode are formed at the same time or when a first electrode is formed, interconnections for electrically connecting elements are formed. Thus, the number of used masks can be reduced, so that the overall fabrication process can be shortened and the production cost can be reduced.

Abstract: A thin film transistor (TFT), including a crystalline semiconductor pattern on a substrate, a gate insulating layer on the crystalline semiconductor pattern, the gate insulating layer having two first source/drain contact holes and a semiconductor pattern access hole therein, a gate electrode on the gate insulating layer, the gate electrode being between the two first source/drain contact holes, an interlayer insulating layer covering the gate electrode, the interlayer insulating layer having two second source/drain contact holes therein, and source and drain electrodes on the interlayer insulating layer, each of the source and drain electrodes being insulated from the gate electrode, and having a portion connected to the crystalline semiconductor pattern through the first and second source/drain contact holes.

Abstract: A thin film transistor (TFT), including a crystalline semiconductor pattern on a substrate, a gate insulating layer on the crystalline semiconductor pattern, the gate insulating layer having two first source/drain contact holes and a semiconductor pattern access hole therein, a gate electrode on the gate insulating layer, the gate electrode being between the two first source/drain contact holes, an interlayer insulating layer covering the gate electrode, the interlayer insulating layer having two second source/drain contact holes therein, and source and drain electrodes on the interlayer insulating layer, each of the source and drain electrodes being insulated from the gate electrode, and having a portion connected to the crystalline semiconductor pattern through the first and second source/drain contact holes.

Abstract: An organic light emitting display (OLED) and a method of fabricating the same are provided. The OLED includes a substrate and a thin film transistor disposed on the substrate. A first inorganic passivation layer is disposed on the thin film transistor. A second inorganic passivation layer whose hydrogen content is higher than that of the first inorganic passivation layer is formed on the first inorganic passivation layer. A pixel electrode electrically connected to the thin film transistor is disposed on the second inorganic passivation layer.

Abstract: A display device includes a substrate, an insulation layer arranged on the substrate and spaced apart from the substrate and including a plurality of stepped portions recessed from a top surface, a first line arranged on the top surface of the insulation layer and a second line comprised of a same material as the first line and being arranged in the stepped portions and having a level difference from the first line.

Abstract: A method of fabricating a TFT array substrate that prevents mobile ions from moving from a photoresist to channels of the TFT by the gate electrode of the TFT by performing photolithography processes for ion injection after forming gate electrode of TFT and, in addition, a method of fabricating a TFT array substrate that omits a photolithography process for forming a lower electrode of a storage capacitor by forming the lower electrode of the storage capacitor by a channel doping process for a PMOS TFT.

Abstract: Methods of fabricating a TFT and an OLED using the same are provided. The method of fabricating a CMOS TFT includes: preparing a substrate having first and second TFT regions; forming a gate electrode on the substrate; forming a gate insulating layer on the entire surface of the substrate including the gate electrode; forming a semiconductor layer on a predetermined region of the gate insulating layer using a mask; exposing the back of the mask using the gate electrode; injecting n-type impurity ions into the semiconductor layers of the first and second TFT regions using the back-exposed mask and forming a channel region and source and drain regions; ashing both sides of the back-exposed mask; injecting low concentration impurity ions into the semiconductor layers of the first and second TFT regions using the ashed mask and forming an LDD region; and injecting p-type impurity ions into the semiconductor layer of the second TFT region and forming source and drain regions.

Abstract: A method of fabricating a Complementary Metal-Oxide Semiconductor (CMOS) Thin Film Transistor (TFT) using a reduced number of masks includes: forming a buffer layer on the entire surface of a substrate; forming polysilicon and photoresist layers on the entire surface of the substrate having the buffer layer; exposing and developing the photoresist layer to form a first photoresist pattern having a first thickness in a region where a semiconductor layer of a first TFT is to be formed, a second thickness in a region where a channel and a Lightly Doped Drain (LDD) region of a second TFT are to be formed, and a third thickness in a region where source and drain regions of the second TFT are to be formed; etching the polysilicon layer using the first photoresist pattern as a mask to pattern the semiconductor layers of the first and second TFTs; performing a first ashing process on the first photoresist pattern to form a second photoresist pattern where the region having the third thickness has been removed from th

Abstract: A thin film transistor (TFT), including a crystalline semiconductor pattern on a substrate, a gate insulating layer on the crystalline semiconductor pattern, the gate insulating layer having two first source/drain contact holes and a semiconductor pattern access hole therein, a gate electrode on the gate insulating layer, the gate electrode being between the two first source/drain contact holes, an interlayer insulating layer covering the gate electrode, the interlayer insulating layer having two second source/drain contact holes therein, and source and drain electrodes on the interlayer insulating layer, each of the source and drain electrodes being insulated from the gate electrode, and having a portion connected to the crystalline semiconductor pattern through the first and second source/drain contact holes.

Abstract: A method of fabricating a CMOS thin film transistor (TFT) and a CMOS TFT fabricated using the method involve provision of a substrate having a first region and a second region. A first semiconductor layer and a second semiconductor layer are formed on the first and second regions, respectively. A gate insulating layer having a first portion overlying end portions of the first semiconductor layer, and a second portion overlying end portions of the second semiconductor layer and having a thickness larger than that of the first portion, is formed on the semiconductor layers. An ion doping mask pattern is formed on the gate insulating layer. First impurities are doped in end portions of the first semiconductor layer using the ion doping mask pattern as a mask, and second impurities having a conductivity type different from that of the first impurities are doped in end portions of the second semiconductor layer.

Abstract: A thin film transistor, a flat panel display device including the same, and a method of fabricating the same. An uneven structure is formed at a part of a polycrystalline silicon layer pattern corresponding to a channel region to form a channel length at the edge of the channel region longer than a main channel length, so that a resistance at the edge of the channel region increases to cause an amount of current flowing through the edge of the channel region to decrease, thereby enhancing the reliability of a circuit at low voltage driving.