Patents by Inventor Eui Won LEE

Eui Won LEE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240144270
    Abstract: A vehicle-to-everything (V2X) communication-based electronic toll collection system (ETCS) according to an embodiment of the present invention includes at least one roadside unit (RSU), a token issuer checking a de-identified token of a vehicle by communicating with an on-board unit (OBU) of the vehicle via the at least one roadside unit, and a clearing house communicating with the token issuer and charging a toll to a driver/owner of the vehicle. The token issuer generates toll information of the vehicle based on the de-identified token of the vehicle and location information of the at least one roadside unit involved in checking the de-identified token.
    Type: Application
    Filed: November 28, 2022
    Publication date: May 2, 2024
    Inventors: Duk Soo KIM, Eui Seok KIM, Sang Gyoo SIM, Ki Ho JOO, Jung Won LEE, Jong Guk LEE, Jung Wook KIM, Sang Seok LEE, Sang Min LEE, Sook Jun GWEON, Hyun Kyung PARK
  • Publication number: 20240078320
    Abstract: Disclosed is a method and apparatus for detecting anomalies in a system log on the basis of self-supervised learning, using a language model. The method comprises performing preprocessing on the system log, generating a normal token sequence having a preset length by concatenating tokenized log lines of the system log, generating an abnormal token sequence using the normal token sequence, calculating an anomaly score for a determination target token sequence using a sentence classification model, and determining the token sequence as an abnormal system log when the calculated anomaly score is greater than a threshold value.
    Type: Application
    Filed: August 2, 2023
    Publication date: March 7, 2024
    Inventors: Duk Soo KIM, Eui Seok KIM, Sang Gyoo SIM, Ki Ho JOO, Jung Won LEE, Jong Guk LEE, Jung Wook KIM, Sang Seok LEE, Seung Young PARK
  • Patent number: 9411700
    Abstract: Disclosed is a storage tester capable of individual control for a plurality of storages, which comprises a host terminal for receiving user's control signal for storage test; a communication interface unit transmitting data among the host terminal, an embedded processor and a data engine unit; a data engine unit for generating pattern data and command data and reading the data from the storage; a sequence control module for controlling respectively a plurality of SATA/SAS/PCIe interface units; and SATA/SAS/PCIe interface unit for connecting to the storage through one among SATA, SAS, PCIe interface according to the signal for interface selection generated from the embedded processor and controlling a plurality of storages according to control of the sequence control module by the embedded processor in order to test respectively connected storage.
    Type: Grant
    Filed: August 7, 2014
    Date of Patent: August 9, 2016
    Assignee: UNITEST INC.
    Inventor: Eui Won Lee
  • Patent number: 9245613
    Abstract: Disclosed is a storage interface apparatus for a solid state drive (SSD) tester which allows a plurality of interfaces to share a single protocol in parts where the protocol is commonly used in a multiple interface for interfacing a storage. The storage interface apparatus for the solid state driver tester includes: a host terminal for receiving a test condition for testing a storage from a user; and a test control unit for generating a test pattern corresponding to the test condition to test the storage. The test control unit includes a storage interface unit for interfacing the storage, and the storage interface unit includes a plurality of interfaces that share a protocol in parts where the protocol is commonly used.
    Type: Grant
    Filed: June 19, 2013
    Date of Patent: January 26, 2016
    Assignee: UNITEST INC
    Inventors: Eui Won Lee, Hyo Jin Oh
  • Patent number: 9171643
    Abstract: Disclosed is a solid state drive tester which reduces the size of the tester and easily changes a function without changing hardware (H/W) by implementing a plurality of devices for testing an SSD as one chip using a Field Programmable Gate Array (FPGA). The solid state drive tester includes: a host terminal receiving a test condition for testing a storage from a user; and a test control unit generating a test pattern corresponding to the test condition, adaptively selecting an interface according to an interface type of the storage to be tested to test the storage using the test pattern, and storing fail data generated during the test in an internal memory. The test control unit is implemented by an FPGA to reduce the size of the tester and easily change a function without hardware.
    Type: Grant
    Filed: June 19, 2013
    Date of Patent: October 27, 2015
    Assignee: UNITEST INC
    Inventors: Eui Won Lee, Hyo Jin Oh
  • Patent number: 9159454
    Abstract: A failure detection apparatus for a solid state driver tester is provided. The failure detection apparatus includes a host terminal for receiving a test condition for testing a storage from a user and a test control unit for creating a test pattern according to the test condition or creating a test pattern at random, and adaptively selects an interface according to a type of the storage to be tested to test the storage with the test pattern. The test control unit includes a plurality of buffer memories for storing readout data of the storage, stores the readout data in the buffer memories in an interleaving manner, and endows comparison of the created test pattern and the readout data stored in the buffer memories with continuity to test the storage in real time.
    Type: Grant
    Filed: June 19, 2013
    Date of Patent: October 13, 2015
    Assignee: UNITEST INC
    Inventor: Eui Won Lee
  • Patent number: 9153345
    Abstract: Disclosed is an error generating apparatus of a solid state drive tester. The error processing operation of the storage is tested by inserting errors into a specific instruction to be transmitted to the storage, and detecting the results of the error processing operation of the storage when testing the storage. The error generating apparatus includes a host terminal for receiving a test condition for a test of a storage from a user, and a test control unit for generating a test pattern according to the test condition or generating a test pattern randomly, generating error data used to test an error characteristic of the storage, and testing the storage based on the test pattern and a normal instruction or an error instruction which is formed by inserting the error data into the normal instruction.
    Type: Grant
    Filed: June 19, 2013
    Date of Patent: October 6, 2015
    Assignee: UNITEST INC
    Inventors: Eui Won Lee, Hyo Jin Oh
  • Patent number: 9015545
    Abstract: Disclosed is a solid state drive tester which divides the functions of generating and comparing test pattern data and Frame Information Structure (FIS) data with each other into each other to implement the functions as separate logics, so that entire test time is decreased by reducing load of a processor. The solid state drive tester includes a host terminal for receiving a test condition for testing a storage from a user, and a test control unit creating a test pattern corresponding to the test condition, and adaptively selecting an interface according to an interface type of the storage to be tested to test the storage using the test pattern, wherein the test control unit is divided into a control module for controlling the test of the storage and a test execution module for practically executing the test in hardware to test a plurality of storages in real time.
    Type: Grant
    Filed: June 19, 2013
    Date of Patent: April 21, 2015
    Assignee: Unitest Inc
    Inventors: Eui Won Lee, Hyo Jin Oh
  • Publication number: 20150067418
    Abstract: Disclosed is a storage tester capable of individual control for a plurality of storages, which comprises a host terminal for receiving user's control signal for storage test; a communication interface unit transmitting data among the host terminal, an embedded processor and a data engine unit; a data engine unit for generating pattern data and command data and reading the data from the storage; a sequence control module for controlling respectively a plurality of SATA/SAS/PCIe interface units; and SATA/SAS/PCIe interface unit for connecting to the storage through one among SATA, SAS, PCIe interface according to the signal for interface selection generated from the embedded processor and controlling a plurality of storages according to control of the sequence control module by the embedded processor in order to test respectively connected storage.
    Type: Application
    Filed: August 7, 2014
    Publication date: March 5, 2015
    Applicant: UNITEST INC.
    Inventor: Eui Won LEE
  • Publication number: 20140047287
    Abstract: Disclosed is a solid state drive tester which divides the functions of generating and comparing test pattern data and Frame Information Structure (FIS) data with each other into each other to implement the functions as separate logics, so that entire test time is decreased by reducing load of a processor. The solid state drive tester includes a host terminal for receiving a test condition for testing a storage from a user, and a test control unit creating a test pattern corresponding to the test condition, and adaptively selecting an interface according to an interface type of the storage to be tested to test the storage using the test pattern, wherein the test control unit is divided into a control module for controlling the test of the storage and a test execution module for practically executing the test in hardware to test a plurality of storages in real time.
    Type: Application
    Filed: June 19, 2013
    Publication date: February 13, 2014
    Inventors: Eui Won LEE, Hyo Jin OH
  • Publication number: 20140047286
    Abstract: Disclosed is a solid state drive tester which reduces the size of the tester and easily changes a function without changing hardware (H/W) by implementing a plurality of devices for testing an SSD as one chip using a Field Programmable Gate Array (FPGA). The solid state drive tester includes: a host terminal receiving a test condition for testing a storage from a user; and a test control unit generating a test pattern corresponding to the test condition, adaptively selecting an interface according to an interface type of the storage to be tested to test the storage using the test pattern, and storing fail data generated during the test in an internal memory. The test control unit is implemented by an FPGA to reduce the size of the tester and easily change a function without hardware.
    Type: Application
    Filed: June 19, 2013
    Publication date: February 13, 2014
    Inventors: Eui Won LEE, Hyo Jin OH
  • Publication number: 20140047289
    Abstract: Disclosed is a failure detection apparatus for a solid state driver tester, the failure detection apparatus including: a host terminal for receiving a test condition for testing a storage from a user; and a test control unit for creating a test pattern according to the test condition or creating a test pattern at random, and adaptively selecting an interface according to a type of the storage to be tested to test the storage with the test pattern. The test control unit includes a plurality of buffer memories for storing readout data of the storage, stores the readout data in the buffer memories in an interleaving manner, and endows comparison of the created test pattern and the readout data stored in the buffer memories with continuity to test the storage in real time.
    Type: Application
    Filed: June 19, 2013
    Publication date: February 13, 2014
    Inventor: Eui Won LEE
  • Publication number: 20140047290
    Abstract: Disclosed is an error generating apparatus of a solid state drive tester. The error processing operation of the storage is tested by inserting errors into a specific instruction to be transmitted to the storage, and detecting the results of the error processing operation of the storage when testing the storage. The error generating apparatus includes a host terminal for receiving a test condition for a test of a storage from a user, and a test control unit for generating a test pattern according to the test condition or generating a test pattern randomly, generating error data used to test an error characteristic of the storage, and testing the storage based on the test pattern and a normal instruction or an error instruction which is formed by inserting the error data into the normal instruction.
    Type: Application
    Filed: June 19, 2013
    Publication date: February 13, 2014
    Inventors: Eui Won LEE, Hyo Jin OH
  • Publication number: 20140047288
    Abstract: Disclosed is a storage interface apparatus for a solid state drive (SSD) tester which allows a plurality of interfaces to share a single protocol in parts where the protocol is commonly used in a multiple interface for interfacing a storage. The storage interface apparatus for the solid state driver tester includes: a host terminal for receiving a test condition for testing a storage from a user; and a test control unit for generating a test pattern corresponding to the test condition to test the storage. The test control unit includes a storage interface unit for interfacing the storage, and the storage interface unit includes a plurality of interfaces that share a protocol in parts where the protocol is commonly used.
    Type: Application
    Filed: June 19, 2013
    Publication date: February 13, 2014
    Inventors: Eui Won LEE, Hyo Jin OH