Patents by Inventor Euisoo Yoo

Euisoo Yoo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240106398
    Abstract: In one aspect, an apparatus comprises: a driver circuit to receive first and second ramp signals and output first and second drive signals under control of a first bias signal and a second bias signal, the first bias signal having a first edge and a second edge, the second edge having a different edge rate than the first edge, the second bias signal having a third edge and a fourth edge, the third edge having a different edge rate than the fourth edge; and an output circuit coupled to the driver circuit, the output circuit comprising at least one first active device to be driven by the first drive signal and at least one second active device to be driven by the second drive signal, where the output circuit is to amplify and output a radio frequency (RF) signal.
    Type: Application
    Filed: September 28, 2022
    Publication date: March 28, 2024
    Inventors: Rangakrishnan Srinivasan, Sriharsha Vasadi, Mustafa Koroglu, Zhongda Wang, Euisoo Yoo, Eddy Bell
  • Publication number: 20240022268
    Abstract: In one embodiment, an integrated circuit includes: a first radio frequency (RF) circuit configured to receive and process a first RF signal having a sub-gigahertz (GHz) frequency to output a first lower frequency signal and to transmit RF signals having the sub-GHz frequency; a second RF circuit configured to receive and process a second RF signal having a frequency of at least substantially 2.4 GHz to output a second lower frequency signal and to transmit RF signals at the at least substantially 2.4 GHz; shared analog circuitry coupled to the first RF circuit and the second RF circuit, the shared analog circuitry to receive at least one of the first RF signal or the second RF signal and output a digital output signal; and a digital circuit coupled to the shared analog circuit, the digital circuit to recover message information from the digital output signal.
    Type: Application
    Filed: September 26, 2023
    Publication date: January 18, 2024
    Inventors: Euisoo Yoo, Arup Mukherji, Rangakrishnan Srinivasan, Vitor Pereira, Zhongda Wang, Sriharsha Vasadi
  • Patent number: 11804862
    Abstract: In one embodiment, an integrated circuit includes: a first radio frequency (RF) circuit configured to receive and process a first RF signal having a sub-gigahertz (GHz) frequency to output a first lower frequency signal and to transmit RF signals having the sub-GHz frequency; a second RF circuit configured to receive and process a second RF signal having a frequency of at least substantially 2.4 GHz to output a second lower frequency signal and to transmit RF signals at the at least substantially 2.4 GHz; shared analog circuitry coupled to the first RF circuit and the second RF circuit, the shared analog circuitry to receive at least one of the first RF signal or the second RF signal and output a digital output signal; and a digital circuit coupled to the shared analog circuit, the digital circuit to recover message information from the digital output signal.
    Type: Grant
    Filed: September 30, 2021
    Date of Patent: October 31, 2023
    Assignee: Silicon Laboratories Inc.
    Inventors: Euisoo Yoo, Arup Mukherji, Rangakrishnan Srinivasan, Vitor Pereira, Zhongda Wang, Sriharsha Vasadi
  • Publication number: 20230099832
    Abstract: In one embodiment, an integrated circuit includes: a first radio frequency (RF) circuit configured to receive and process a first RF signal having a sub-gigahertz (GHz) frequency to output a first lower frequency signal and to transmit RF signals having the sub-GHz frequency; a second RF circuit configured to receive and process a second RF signal having a frequency of at least substantially 2.4 GHz to output a second lower frequency signal and to transmit RF signals at the at least substantially 2.4 GHz; shared analog circuitry coupled to the first RF circuit and the second RF circuit, the shared analog circuitry to receive at least one of the first RF signal or the second RF signal and output a digital output signal; and a digital circuit coupled to the shared analog circuit, the digital circuit to recover message information from the digital output signal.
    Type: Application
    Filed: September 30, 2021
    Publication date: March 30, 2023
    Inventors: Euisoo Yoo, Arup Mukherji, Rangakrishnan Srinivasan, Vitor Pereira, Zhongda Wang, Sriharsha Vasadi
  • Patent number: 10944617
    Abstract: An apparatus includes a radio-frequency (RF) receiver. The RF receiver includes an analog-to-digital converter (ADC) to convert an analog input signal to a digital output signal in response to an ADC clock signal. The RF receiver further includes a frequency generator to selectively provide either a clock signal to be provided as the ADC clock signal or a signal to be used for in-phase-quadrature (IQ) calibration of the RF receiver.
    Type: Grant
    Filed: January 12, 2018
    Date of Patent: March 9, 2021
    Assignee: Silicon Laboratories Inc.
    Inventors: Hendricus de Ruijter, Euisoo Yoo
  • Patent number: 10823693
    Abstract: In an embodiment, an integrated circuit includes: a switched capacitor coupled between a supply voltage node and a divider node, where a thermistor external to the integrated circuit is to couple to the divider node; an analog-to-digital converter (ADC) coupled to the divider node to receive a voltage at the divider node and generate a digital value based thereon; and a controller coupled to the ADC to determine a temperature associated with the thermistor based at least in part on the digital value.
    Type: Grant
    Filed: January 4, 2018
    Date of Patent: November 3, 2020
    Assignee: Silicon Laboratories Inc.
    Inventors: Euisoo Yoo, Thomas Edward Voor, John M. Khoury
  • Patent number: 10763781
    Abstract: A system and method of performing temperature compensation based on temperature of a crystal. An integrated circuit includes a clock circuit, a memory, an interface developing a sense voltage indicative of a temperature of the crystal, and a controller. The memory stores compensation values including nominal values based on a nominal third order polynomial that defines a nominal frequency versus temperature relationship of a crystal design representing multiple crystals, and a pair of adjustment values derived from two temperature-frequency error points. The controller determines a temperature value based on the sense voltage, calculates a frequency offset using the temperature value and the compensation values to solve a compensated third order polynomial defining a compensated frequency versus temperature relationship of the crystal, and adjusts a clock signal of the clock circuit using the frequency offset. A Wi-Fi device may be optimized for industrial IoT operating within an extended temperature range.
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: September 1, 2020
    Assignee: Silicon Laboratories Inc.
    Inventors: Thomas Edward Voor, Jeffrey A. Tindle, Euisoo Yoo, Wei Shen
  • Publication number: 20190305725
    Abstract: A system and method of performing temperature compensation based on temperature of a crystal. An integrated circuit includes a clock circuit, a memory, an interface developing a sense voltage indicative of a temperature of the crystal, and a controller. The memory stores compensation values including nominal values based on a nominal third order polynomial that defines a nominal frequency versus temperature relationship of a crystal design representing multiple crystals, and a pair of adjustment values derived from two temperature-frequency error points. The controller determines a temperature value based on the sense voltage, calculates a frequency offset using the temperature value and the compensation values to solve a compensated third order polynomial defining a compensated frequency versus temperature relationship of the crystal, and adjusts a clock signal of the clock circuit using the frequency offset. A Wi-Fi device may be optimized for industrial IoT operating within an extended temperature range.
    Type: Application
    Filed: June 29, 2018
    Publication date: October 3, 2019
    Inventors: THOMAS EDWARD VOOR, JEFFREY A. TINDLE, EUISOO YOO, WEI SHEN
  • Publication number: 20190222463
    Abstract: An apparatus includes a radio-frequency (RF) receiver. The RF receiver includes an analog-to-digital converter (ADC) to convert an analog input signal to a digital output signal in response to an ADC clock signal. The RF receiver further includes a frequency generator to selectively provide either a clock signal to be provided as the ADC clock signal or a signal to be used for in-phase-quadrature (IQ) calibration of the RF receiver.
    Type: Application
    Filed: January 12, 2018
    Publication date: July 18, 2019
    Inventors: Hendricus de Ruijter, Euisoo Yoo
  • Publication number: 20190204253
    Abstract: In an embodiment, an integrated circuit includes: a switched capacitor coupled between a supply voltage node and a divider node, where a thermistor external to the integrated circuit is to couple to the divider node; an analog-to-digital converter (ADC) coupled to the divider node to receive a voltage at the divider node and generate a digital value based thereon; and a controller coupled to the ADC to determine a temperature associated with the thermistor based at least in part on the digital value.
    Type: Application
    Filed: January 4, 2018
    Publication date: July 4, 2019
    Inventors: Euisoo Yoo, Thomas Edward Voor, John M. Khoury