Patents by Inventor Eul Chul Jang

Eul Chul Jang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9609742
    Abstract: Package substrates are provided. The package substrate may include a power line and a ground line on a first surface of a substrate body; a plurality of signal lines on the first surface between the power line and the ground line; and a lower ground pattern and a lower power pattern positioned on a second surface of the substrate body opposite to the first surface. The lower ground pattern may be disposed to be opposite to the power line and the lower power pattern may be disposed to be opposite to the ground line. Related semiconductor packages are also provided.
    Type: Grant
    Filed: August 30, 2013
    Date of Patent: March 28, 2017
    Assignee: SK hynix Inc.
    Inventors: Eul Chul Jang, Qwan Ho Chung, Sang Joon Lim, Sung Woo Han
  • Publication number: 20140175680
    Abstract: Package substrates are provided. The package substrate may include a power line and a ground line on a first surface of a substrate body; a plurality of signal lines on the first surface between the power line and the ground line; and a lower ground pattern and a lower power pattern positioned on a second surface of the substrate body opposite to the first surface. The lower ground pattern may be disposed to be opposite to the power line and the lower power pattern may be disposed to be opposite to the ground line. Related semiconductor packages are also provided.
    Type: Application
    Filed: August 30, 2013
    Publication date: June 26, 2014
    Applicant: SK hynix Inc.
    Inventors: Eul Chul JANG, Qwan Ho CHUNG, Sang Joon LIM, Sung Woo HAN
  • Patent number: 8084839
    Abstract: A circuit board having a board body includes a via structure. The via structure includes a conductive connector passing through the board body and a conductive shield member surrounding at least a portion of the conductive connector. The shield member prevents distortion of a data signal applied to the conductive connector, and also intercepts electromagnetic waves generated by the conductive connector.
    Type: Grant
    Filed: August 30, 2010
    Date of Patent: December 27, 2011
    Assignee: Hynix Semiconductor Inc.
    Inventors: Bok Kyu Choi, Sang Joon Lim, Eul Chul Jang
  • Publication number: 20100321900
    Abstract: A circuit board having a board body includes a via structure. The via structure includes a conductive connector passing through the board body and a conductive shield member surrounding at least a portion of the conductive connector. The shield member prevents distortion of a data signal applied to the conductive connector, and also intercepts electromagnetic waves generated by the conductive connector.
    Type: Application
    Filed: August 30, 2010
    Publication date: December 23, 2010
    Applicant: HYNIX SEMICONDUCTOR INC.
    Inventors: Bok Kyu CHOI, Sang Joon LIM, Eul Chul JANG
  • Patent number: 7808072
    Abstract: A circuit board having a board body includes a via structure. The via structure includes a conductive connector passing through the board body and a conductive shield member surrounding at least a portion of the conductive connector. The shield member prevents distortion of a data signal applied to the conductive connector, and also intercepts electromagnetic waves generated by the conductive connector.
    Type: Grant
    Filed: May 8, 2008
    Date of Patent: October 5, 2010
    Assignee: Hynix Semiconductor Inc.
    Inventors: Bok Kyu Choi, Sang Joon Lim, Eul Chul Jang
  • Publication number: 20090224376
    Abstract: A circuit board having a board body includes a via structure. The via structure includes a conductive connector passing through the board body and a conductive shield member surrounding at least a portion of the conductive connector. The shield member prevents distortion of a data signal applied to the conductive connector, and also intercepts electromagnetic waves generated by the conductive connector.
    Type: Application
    Filed: May 8, 2008
    Publication date: September 10, 2009
    Inventors: Bok Kyu CHOI, Sang Joon LIM, Eul Chul JANG
  • Publication number: 20060027901
    Abstract: A stacked chip package with exposed lead-frame bottom surface is disclosed. The stacked chip package includes a first die encapsulated in an encapsulated molding compound, which is mounted on an active surface of a second die. A bottom surface of the second die is mounted to a top surface of a die supporting section of the lead-frame. The bottom surface of the die supporting section is exposed outside the encapsulated molding compound. A plurality of bonding wires electrically interconnect the die pads of the first die and the second die to the corresponding lead fingers. Moreover, each lead finger of the lead-frame is preferably formed with a deflected structure with a bent section, which enables the dimension size of the stacked chip package to get more compact.
    Type: Application
    Filed: August 9, 2004
    Publication date: February 9, 2006
    Inventors: Ming-Sung Tsai, Jin-Ho Kim, Eul-Chul Jang