Patents by Inventor Eula Faye A. Tolentino

Eula Faye A. Tolentino has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11106466
    Abstract: A computer processor includes an issue queue to receive an instruction, and one or more execution units to generate a condition code bit corresponding to the instruction. A branch condition queue is in signal communication with the issue queue, and receives the instruction from the issue queue before the at least one execution unit generates the condition code bit.
    Type: Grant
    Filed: June 18, 2018
    Date of Patent: August 31, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Nicholas R. Orzol, Michael J. Genden, Hung Q. Le, Dung Q. Nguyen, Eula Faye A. Tolentino, Brian W. Thompto
  • Publication number: 20190384607
    Abstract: A computer processor includes an issue queue to receive an instruction, and one or more execution units to generate a condition code bit corresponding to the instruction. A branch condition queue is in signal communication with the issue queue, and receives the instruction from the issue queue before the at least one execution unit generates the condition code bit.
    Type: Application
    Filed: June 18, 2018
    Publication date: December 19, 2019
    Inventors: Nicholas R. Orzol, Michael J. Genden, Hung Q. Le, Dung Q. Nguyen, Eula Faye A. Tolentino, Brian W. Thompto
  • Patent number: 10248426
    Abstract: Techniques are disclosed for restoring register data in a processor. In one embodiment, a method includes receiving an instruction to flush one or more general purpose registers (GPRs) in a processor. The method also includes determining history buffer entries of a history buffer to be restored to the one or more GPRs. The method includes creating a mask vector that indicates which history buffer entries will be restored to the one or more GPRs. The method further includes restoring the indicated history buffer entries to the one or more GPRs. As each indicated history buffer entry is restored, the method includes updating the mask vector to indicate which history buffer entries have been restored.
    Type: Grant
    Filed: May 24, 2016
    Date of Patent: April 2, 2019
    Assignee: International Business Machines Corporation
    Inventors: Brian D. Barrick, Steven J. Battle, Joshua W. Bowman, Christopher M. Mueller, Dung Q. Nguyen, David R. Terry, Eula Faye Tolentino, Jing Zhang
  • Publication number: 20170344380
    Abstract: Techniques are disclosed for restoring register data in a processor. In one embodiment, a method includes receiving an instruction to flush one or more general purpose registers (GPRs) in a processor. The method also includes determining history buffer entries of a history buffer to be restored to the one or more GPRs. The method includes creating a mask vector that indicates which history buffer entries will be restored to the one or more GPRs. The method further includes restoring the indicated history buffer entries to the one or more GPRs. As each indicated history buffer entry is restored, the method includes updating the mask vector to indicate which history buffer entries have been restored.
    Type: Application
    Filed: May 24, 2016
    Publication date: November 30, 2017
    Inventors: Brian D. BARRICK, Steven J. BATTLE, Joshua W. BOWMAN, Christopher M. MUELLER, Dung Q. NGUYEN, David R. TERRY, Eula Faye TOLENTINO, Jing ZHANG