Patents by Inventor Eun-ah Ko

Eun-ah Ko has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Negative capacitance FinFET device and manufacturing method of the same
    Patent number: 9831239
    Abstract: Provided is a negative capacitance FinFET device including a FinFET device including a gate stack, a drain electrode and a source electrode formed on a substrate and a ferroelectric negative capacitor connected to the gate stack of the FinFET device and having a negative capacitance. The FinFET device has an extension length (Lext) from a side-wall of the gate stack to the drain electrode or the source electrode and the extension length is set such that a size of a hysteresis window in the negative capacitance FinFET device is 1 V or less.
    Type: Grant
    Filed: March 31, 2017
    Date of Patent: November 28, 2017
    Assignee: University of Seoul Industry Cooperation Foundation
    Inventors: Chang Hwan Shin, Eun Ah Ko
  • LED driver apparatus
    Patent number: 8860320
    Abstract: A Light Emitting Diode (LED) driver apparatus is provided. The LED driver apparatus includes: a Pulse Width Modulation (PWM) signal generator configured to generate a PWM signal, a DC-DC converter configured to provide a driving voltage of a plurality of LED arrays by using the generated PWM signal, and a sensor configured to determine whether at least one LED array among the plurality of LED arrays is in an open state in response to the driving voltage being higher than or equal to a preset first reference voltage, and the preset first reference voltage is higher than the driving voltage applied when the plurality of LED arrays are each in a working state.
    Type: Grant
    Filed: August 15, 2012
    Date of Patent: October 14, 2014
    Assignee: Magnachip Semiconductor, Ltd.
    Inventors: Tae-kyoung Kang, Chang-sik Lim, Eun-ah Ko, Beom-seon Ryu
  • LED DRIVER APPARATUS
    Publication number: 20130049614
    Abstract: A Light Emitting Diode (LED) driver apparatus is provided. The LED driver apparatus includes: a Pulse Width Modulation (PWM) signal generator configured to generate a PWM signal, a DC-DC converter configured to provide a driving voltage of a plurality of LED arrays by using the generated PWM signal, and a sensor configured to determine whether at least one LED array among the plurality of LED arrays is in an open state in response to the driving voltage being higher than or equal to a preset first reference voltage, and the preset first reference voltage is higher than the driving voltage applied when the plurality of LED arrays are each in a working state.
    Type: Application
    Filed: August 15, 2012
    Publication date: February 28, 2013
    Applicant: MAGNACHIP SEMICONDUCTOR, LTD.
    Inventors: Tae-kyoung Kang, Chang-sik Lim, Eun-ah Ko, Beom-seon Ryu
  • Negative capacitance FinFET device and manufacturing method of the same
    Patent number: RE49015
    Abstract: Provided is a negative capacitance FinFET device including a FinFET device including a gate stack, a drain electrode and a source electrode formed on a substrate and a ferroelectric negative capacitor connected to the gate stack of the FinFET device and having a negative capacitance. The FinFET device has an extension length (Lext) from a side-wall of the gate stack to the drain electrode or the source electrode and the extension length is set such that a size of a hysteresis window in the negative capacitance FinFET device is 1 V or less.
    Type: Grant
    Filed: June 5, 2019
    Date of Patent: April 5, 2022
    Inventors: Chang Hwan Shin, Eun Ah Ko
  • Negative capacitance fet device with reduced hysteresis window
    Patent number: RE49563
    Abstract: Provided is a negative capacitance FinFET device including a FinFET device including a gate stack, a drain electrode and a source electrode formed on a substrate and a ferroelectric negative capacitor connected to the gate stack of the FinFET device and having a negative capacitance. The FinFET device has an extension length (Lext) from a side-wall of the gate stack to the drain electrode or the source electrode and the extension length is set such that a size of a hysteresis window in the negative capacitance FinFET device is 1 V or less.
    Type: Grant
    Filed: February 15, 2022
    Date of Patent: June 27, 2023
    Inventors: Chang Hwan Shin, Eun Ah Ko