Patents by Inventor Eun-Chan Lim

Eun-Chan Lim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240420928
    Abstract: A plasma shield assembly may include a guide component including first through holes connected to plasma generators that generate radicals using process gas, and a shield component detachably coupled to the guide component and disposed on a lower surface of the guide component, and including second through holes aligned with the first through holes to pass the radicals from the first through holes. The shield component may be spaced apart from the lower surface of the guide component with a gap formed between the shield component and the guide component. Bumper rings disposed adjacent to the second through holes to prevent the radicals from entering the gap.
    Type: Application
    Filed: March 12, 2024
    Publication date: December 19, 2024
    Inventors: Eun Chan LIM, Hae Young YOO, Eun Soo LEE, Seon Uk PARK, Yong Mun CHANG, Hyun Ku PARK, Jae Ryong LEE
  • Publication number: 20230311404
    Abstract: An imprint device according to an embodiment includes: a stage, which supports a substrate; a press roller, which presses a film with respect to the substrate; a first load cell and a second load cell, which are disposed corresponding to opposite ends of the press roller, respectively; and a controller, which monitors a release state of the film based on an output of the first load cell and an output of the second load cell.
    Type: Application
    Filed: November 18, 2022
    Publication date: October 5, 2023
    Inventors: Kangwon LEE, Soo Beom JO, Dong Kyun KO, Kyungjoo MIN, Eun Chan LIM, Myung Soo HUH
  • Patent number: 9252158
    Abstract: A thin film transistor array panel includes a first insulating substrate, a gate electrode positioned on the first insulating substrate, a gate insulating layer positioned on the gate electrode, a semiconductor layer positioned on the gate insulating layer, and a source electrode and a drain electrode positioned on the semiconductor layer and spaced apart from each other, in which the semiconductor layer includes three or more amorphous silicon layers having different bandgap energies from one another in order to reduce a leakage current and improve performance of a liquid crystal display.
    Type: Grant
    Filed: December 10, 2013
    Date of Patent: February 2, 2016
    Assignee: Samsung Display Co., Ltd.
    Inventors: Sung Hoon Yang, Hyeong Suk Yoo, Hae Yoon Jung, Jong-Chul Park, Jong Hyun Park, Jang-Ki Baek, Eun-Chan Lim
  • Publication number: 20150008434
    Abstract: A thin film transistor array panel includes a first insulating substrate, a gate electrode positioned on the first insulating substrate, a gate insulating layer positioned on the gate electrode, a semiconductor layer positioned on the gate insulating layer, and a source electrode and a drain electrode positioned on the semiconductor layer and spaced apart from each other, in which the semiconductor layer includes three or more amorphous silicon layers having different bandgap energies from one another in order to reduce a leakage current and improve performance of a liquid crystal display.
    Type: Application
    Filed: December 10, 2013
    Publication date: January 8, 2015
    Applicant: Samsung Display Co., Ltd.
    Inventors: Sung Hoon Yang, Hyeong Suk Yoo, Hae Yoon Jung, Jong-Chul Park, Jong Hyun Park, Jang-Ki Baek, Eun-Chan Lim