Abstract: A variable displacement swash plate type compressor control method and a variable displacement swash plate type compressor controlled thereby may include a first determination step of determining whether liquid refrigerant exists within the variable displacement swash plate type compressor; a first operation step of applying power to the field coil assembly and of not applying current to the electronic control valve, when it is determined in the first determination step S1 that the liquid refrigerant exists; a second determination step of comparing an elapsed period of time of operating in the first operation step with a predetermined reference time; and a second operation step of maintaining the power applied in the first operation step to the field coil assembly and applying current to the electronic control valve when the elapsed period of time is greater than or equal to the reference time.

Abstract: The carrier-foil-attached ultra-thin copper foil according to one embodiment of the present invention comprises a carrier foil, a release layer, a first ultra-thin copper foil, a Cu—Al bonding strength improvement layer, an Al layer, and a second ultra-thin copper foil, wherein the release layer may comprise a first metal (A3) having peeling properties, and a second metal (B3) and third metal (C3) facilitating the plating of the first metal (A3).

Abstract: A cooling module for a parallel type power module of an inverter may include parallel type power modules configured to be disposed in three or more columns and rows, wherein three parallel type power modules are disposed to correspond to U, V, and W phases of the inverter in the three or more rows in each of the three or more columns, a first cooling water passage having a passage through which cooling water flows and configured to be brought into contact with an upper surface and a lower surface of a power module disposed at a first row, and a second cooling water passage having a passage through which the cooling water flows and configured to be brought into contact with an upper surface and a lower surface of a power module disposed at a third row.

Abstract: A cooling module for a parallel type power module of an inverter may include parallel type power modules configured to be disposed in three or more columns and rows, wherein three parallel type power modules are disposed to correspond to U, V, and W phases of the inverter in the three or more rows in each of the three or more columns, a first cooling water passage having a passage through which cooling water flows and configured to be brought into contact with an upper surface and a lower surface of a power module disposed at a first row, and a second cooling water passage having a passage through which the cooling water flows and configured to be brought into contact with an upper surface and a lower surface of a power module disposed at a third row.

Abstract: A cooling module for a parallel type power module of an inverter may include parallel type power modules configured to be disposed in three or more columns and rows, wherein three parallel type power modules are disposed to correspond to U, V, and W phases of the inverter in the three or more rows in each of the three or more columns, a first cooling water passage having a passage through which cooling water flows and configured to be brought into contact with an upper surface and a lower surface of a power module disposed at a first row, and a second cooling water passage having a passage through which the cooling water flows and configured to be brought into contact with an upper surface and a lower surface of a power module disposed at a third row.

Abstract: A cooling module for a parallel type power module of an inverter may include parallel type power modules configured to be disposed in three or more columns and rows, wherein three parallel type power modules are disposed to correspond to U, V, and W phases of the inverter in the three or more rows in each of the three or more columns, a first cooling water passage having a passage through which cooling water flows and configured to be brought into contact with an upper surface and a lower surface of a power module disposed at a first row, and a second cooling water passage having a passage through which the cooling water flows and configured to be brought into contact with an upper surface and a lower surface of a power module disposed at a third row.

Abstract: A positive active material for a rechargeable lithium battery includes a LiCoO2 particle. An interior of the particle has a layered structure and a surface of the particle has a spinel structure.

Abstract: Disclosed are a negative active material for a rechargeable lithium battery, a method of preparing the same, and a rechargeable lithium battery including the same. The negative active material includes a composite particle including a silicon particle and a carbon coating layer coated on the surface of the silicon particle and a porous space formed by the entangled carbon nanofibers, the composite particle contacting the external surface of the carbon nanofibers in the porous space of the carbon nanofiber structure, and the carbon nanofibers have a larger diameter than that of the composite particle and a diameter ranging from about 100 nm to about 2000 nm.

Abstract: A positive active material for a rechargeable lithium battery includes a LiCoO2 particle. An interior of the particle has a layered structure and a surface of the particle has a spinel structure.

Abstract: Disclosed are a negative active material for a rechargeable lithium battery, a method of preparing the same, and a rechargeable lithium battery including the same. The negative active material includes a composite particle including a silicon particle and a carbon coating layer coated on the surface of the silicon particle and a porous space formed by the entangled carbon nanofibers, the composite particle contacting the external surface of the carbon nanofibers in the porous space of the carbon nanofiber structure, and the carbon nanofibers have a larger diameter than that of the composite particle and a diameter ranging from about 100 nm to about 2000 nm.

Abstract: An electrolyte additive for a rechargeable lithium battery, represented by the following Chemical Formula 1: wherein, R1 to R4 are each independently selected from hydrogen, an aliphatic saturated hydrocarbon group, an aliphatic unsaturated hydrocarbon group, an aromatic hydrocarbon group, a heterocyclic group, or a combination thereof, provided that at least one of R1 or R2 and at least one of R3 or R4 are independently an unsaturated hydrocarbon group including at least one carbon-carbon double bond, and R5 is selected from hydrogen, a halogen, an aliphatic saturated or unsaturated hydrocarbon group, an aromatic hydrocarbon group, a hydroxyl group, a nitro group, a cyano group, an imino group, an amino group, an amidino group, a hydrazine group, a carboxyl group, a heterocyclic group, or a combination thereof.

Abstract: A recessed gate structure in a semiconductor device includes a gate electrode partially buried in a substrate, a blocking member formed in the buried portion of the gate electrode, and a gate insulation layer formed between the gate electrode and the substrate. The blocking member may effectively prevent a void or a seam in the buried portion of the gate electrode from contacting the gate insulation layer adjacent to a channel region in subsequent manufacturing processes. Thus, the semiconductor device may have a regular threshold voltage and a leakage current passing through the void or the seam may efficiently decrease.

Abstract: A recessed gate structure in a semiconductor device includes a gate electrode partially buried in a substrate, a blocking member formed in the buried portion of the gate electrode, and a gate insulation layer formed between the gate electrode and the substrate. The blocking member may effectively prevent a void or a seam in the buried portion of the gate electrode from contacting the gate insulation layer adjacent to a channel region in subsequent manufacturing processes. Thus, the semiconductor device may have a regular threshold voltage and a leakage current passing through the void or the seam may efficiently decrease.

Abstract: According to some embodiments of the invention, a method of forming a transistor includes forming a device isolation layer in a semiconductor substrate. The device isolation layer is formed to define at least one active region. A channel region is formed in a predetermined portion of the active region of the semiconductor substrate. Two channel portion holes are formed to extend downward from a main surface of the semiconductor substrate to be in contact with the channel region. Gate patterns fill the channel portion holes and cross the active region. The resulting transistor is capable of ensuring a constant threshold voltage without being affected by an alignment state of the channel portion hole and the gate pattern.

Abstract: A method of driving a plasma display panel that is adaptive for improving brightness and efficiency. In the method, a sustaining pulse for sustaining a discharge of a cell selected in a sustaining interval is alternately applied to each of a sustaining electrode pair. A pulse signal synchronized with the sustaining pulse is applied to a data electrode to cause a discharge for inducing a long-path discharge between the sustaining electrode pair between any one of the sustaining electrode pair and the data electrode.

Abstract: A coupling capacitor and a semiconductor memory device using the same are provided. In an embodiment, each memory cell of the semiconductor memory device includes a coupling capacitor so that a storage capacitor can store at least 2 bits of data. The coupling capacitor has a capacitance having a predetermined ratio with respect to the capacitance of the storage capacitor. For this, the coupling capacitor is formed by substantially the same fabrication process as the storage capacitor. The predetermined ratio is obtained by choosing an appropriate number of individual capacitors, each with the same capacitance of the storage capacitor, to comprise the coupling capacitor. Also, the coupling capacitor is disposed on an interlayer insulating layer that buries a bit line in a cell region and a sense amplifier in a sense amplifier region.

Abstract: According to some embodiments of the invention, a method of forming a transistor includes forming a device isolation layer in a semiconductor substrate. The device isolation layer is formed to define at least one active region. A channel region is formed in a predetermined portion of the active region of the semiconductor substrate. Two channel portion holes are formed to extend downward from a main surface of the semiconductor substrate to be in contact with the channel region. Gate patterns fill the channel portion holes and cross the active region. The resulting transistor is capable of ensuring a constant threshold voltage without being affected by an alignment state of the channel portion hole and the gate pattern.

Abstract: According to some embodiments of the invention, a method of forming a transistor includes forming a device isolation layer in a semiconductor substrate. The device isolation layer is formed to define at least one active region. A channel region is formed in a predetermined portion of the active region of the semiconductor substrate. Two channel portion holes are formed to extend downward from a main surface of the semiconductor substrate to be in contact with the channel region. Gate patterns fill the channel portion holes and cross the active region. The resulting transistor is capable of ensuring a constant threshold voltage without being affected by an alignment state of the channel portion hole and the gate pattern.

Abstract: A plasma display panel and a method and apparatus for driving the same are provided that are capable of preventing miss-writing and improving discharge and light-emission efficiencies. In the panel, an upper substrate and a lower substrate are opposed to each other and have a plurality of discharge cells therebetween. A first upper electrode group is formed on the upper substrate and includes at least one electrode. A second upper electrode group is formed on the upper substrate in such a manner to be adjacent to the first upper electrode group and includes at least one electrode having a different width from the first upper electrode group. A data electrode is provided on the lower substrate in such a manner to be perpendicular to the first and second upper electrode groups.

Abstract: A plasma display panel having higher light-emitting luminance and efficiency of a discharge cell includes: plurality of first barriers successively formed on a substrate at predetermined intervals; a plurality of first sustain electrodes formed at a width more than 40% of a pixel pitch, which is an overall distance of four of the barriers, to be orthogonal to the first barriers; a plurality of second sustain electrodes spaced apart from the first sustain electrodes at a distance less than 20% of the pixel pitch and mated with the first sustain electrodes one by one; a dielectric layer formed at a thickness of 25 ?m or more to cover the first and second sustain electrodes; and a plurality of pads formed on some of the dielectric layer corresponding to the first sustain electrodes and the second sustain electrodes in each discharge cell.