Abstract: The present disclosure relates to an electrode for a battery including a porous support and a conductive coating layer formed on at least one surface of the porous support. The electrode may be a negative electrode or a positive electrode, preferably a negative electrode. The electrode is applicable to both an all-solid-state battery and a lithium secondary battery.

Abstract: A solid-state battery comprising a positive electrode, a negative electrode, and a solid electrolyte membrane between the positive electrode and the negative electrode, the solid electrolyte membrane including a first solid electrolyte layer and a second solid electrolyte layer, is provided. The first solid electrolyte layer faces the positive electrode and includes a first sulfide-based solid electrolyte, and the second solid electrolyte layer includes a second sulfide-based solid electrolyte having an average particle diameter (D50) larger than an average particle diameter (D50) of the first sulfide-based solid electrolyte.

Abstract: The present disclosure relates to an all-solid-state battery including a thin film current collector and a method of manufacturing the same, and more particularly to a current collector having a thickness of less than 5 µm, which is thermally treated together with a solid electrolyte, whereby interfacial resistance between the current collector and the solid electrolyte is reduced, and therefore the overall size of the all-solid-state battery is reduced.

Abstract: A roll map of an electrode coating process includes a roll map bar and a representation part. The roll map bar is displayed on a screen in synchronization with movement of an electrode between an unwinder and a rewinder while being coated with an electrode slurry in a roll-to-roll state. The roll map bar is displayed in the form of a bar by simulating the electrode in the roll-to-roll state. The representation part is configured to visually show either one of or both quality-related and defect-related acquired data associated with the electrode coating process. The acquired data is shown at a certain location on the roll map bar corresponding to a location in the electrode at which the data is measured. A roll map of an electrode coating process is generated by a process. A roll map of an electrode coating process is generated by a system.

Abstract: A circuit board according to an embodiment includes: an insulating layer including a first region and a second region; a plurality of outer layer circuit patterns disposed on upper surfaces of the first region and the second region of the insulating layer; and a solder resist including a first part disposed on the first region of the insulating layer and a second part disposed on the second region of the insulating layer; wherein the first part includes an upper surface having a curved surface and exposes an upper surface of an outer layer circuit pattern disposed on the first region of the insulating layer, wherein the second part covers an upper surface of an outer layer circuit pattern disposed on the second region of the insulating layer, and wherein at least a part of the upper surface of the first part is positioned lower than the upper surface of the outer layer circuit pattern.

Abstract: This disclosure presents a system and a method for providing a personalized book in which an interested matter is analyzed based on reading history, and a personalized book is generated which includes personalized contents and illustrations based on the interested matter. The presented system for providing a personalized book includes a reading history database which stores a reading history associating a user identifier and a book identifier with each other, a book information database which stores book information including a book identifier, text data, and image data, and a service server configured to deduce an interested matter of a user based on the reading history of the user stored in the reading history database in response to a personalized book generation request from a user terminal, and to generate a personalized book based on the interested matter and the book information stored in the book information database.

Abstract: A circuit board according to an embodiment comprises: an insulating layer including first to third regions; an outer layer circuit pattern disposed on the upper surface of the first to third regions of the insulating layer; and a solder resist including a first part disposed in the first region of the insulating layer, a second part disposed in the second region, and a third part disposed in the third region, wherein the outer layer circuit pattern has a first height, the third part of the solder resist is disposed on the upper surface of the outer layer circuit pattern to have a second height, the first region includes a first sub-region and a second sub-region, the first part includes a first sub-part disposed in the first sub-region and a second sub-part disposed in the second sub-region, the upper surface of the first sub-part is located to be higher than the upper surface of the outer layer circuit pattern and lower than the upper surface of the third part, the upper surface of the second sub-part is loc

Abstract: A printed circuit board according to an embodiment comprises: an insulating layer; a circuit pattern disposed on the upper surface of the insulating layer; a support layer which is disposed on the upper surface of the insulating layer to expose the upper surface of the circuit pattern and is in contact with the sides of the circuit pattern; and a protective layer disposed on the upper surfaces of the support layer and the circuit pattern, wherein the upper region of the insulating layer comprises a first region and a second region, and the protective layer comprises an open region exposing the upper surfaces of the support layer and the circuit pattern that are disposed in the first region, and the support layer comprises a first upper surface positioned at the highest level among the upper surfaces of the support layer and a second upper surface positioned at the lowest level among the upper surfaces of the support layer, the second upper surface being lower than the first upper surface, and the protective l

Abstract: A method and apparatus for allocating a memory address in a resource-centric network are disclosed. The method of allocating a memory address may include receiving a request for a new service, determining whether the new service is able to be accommodated in a virtual memory that is pre-allocated in a resource-centric network, when the new service is able to be accommodated, allocating a memory area for accommodating the new service to the virtual memory, and when the new service is not able to be accommodated, allocating the memory area by using an additionally allocated area of a virtual memory of the resource-centric network.

Abstract: The present disclosure relates to an oxide-based solid electrolyte for low-temperature sintering process and a method of manufacturing the same, and more particularly to a low-temperature sintering process having no problem of side reaction between a positive electrode active material and an oxide-based solid electrolyte through use of a low-melting point dissimilar oxide and a method of manufacturing an all-solid-state battery including a positive electrode manufactured thereby.

Abstract: Provided are a memory access method and a server for performing the same. A memory access method performed by an optical interleaver included in a server includes receiving a request message from a requester processing engine included in the server, setting receiving buffers corresponding to different wavelengths corresponding to the number of external memory/storage devices connected to the server, multiplexing the same request message at the different wavelengths according to a wavelength division multiplexing (WDM) scheme, and transmitting the multiplexed request messages to the respective external memory/storage devices, wherein an address of a virtual memory managed by the server is separated and stored according to an interleaving scheme by a responder included in each of the external memory/storage devices.

Abstract: The present disclosure relates to a solid state battery comprising silicon (Si) as a negative electrode active material. The solid state battery according to the present disclosure does not comprise a conductive material and a solid electrolyte in the negative electrode and comprise a minimum amount of binder. According to this structural feature, the battery according to the present disclosure has good electrical and chemical properties including heat resistant stability, energy density, life characteristics and Coulombic efficiency.

Abstract: An electrode for a solid state battery is provided. The electrode active material layer of the electrode shows improved mechanical properties, such as elasticity or rigidity, of the electrode layer through the crosslinking of a binder resin. Thus, it is possible to inhibit or reduce the effect of swelling and/or shrinking of the electrode active material during charging/discharging. Therefore, the interfacial adhesion between the electrode active material layer and an electrolyte layer and the interfacial adhesion between the electrode active material layer and a current collector are maintained to a high level to provide a solid state battery having excellent cycle characteristics.

Abstract: An electrode loss measuring apparatus includes an electrode which moves in a roll-to-roll state between an unwinder and a rewinder and on which a plurality of reference points are marked at predetermined intervals . The apparatus further includes a reference point detector configured to detect the reference points marked on the electrode, a position measurer configured to derive a position value of the electrode according to a rotation amount of the unwinder or the rewinder and a position value of the corresponding reference point in conjunction with the reference point detector when the reference point detector detects the reference point, and a calculator configured to calculate a loss amount of the electrode by comparing the derived position value of the reference point with a position value of a set reference point when an interval between the reference points is changed due to a loss of a portion of the electrode.

Abstract: A roll map coordinate correction system simulating an electrode moving in a roll-to-roll state between an unwinder and a rewinder includes a position expressed as a coordinate in a length direction of the simulated electrode, an encoder configured to derive the position of the electrode according to rotation amounts of the unwinder and the rewinder, and a seam detection sensor configured to detect a seam connection member and acquire a coordinate of the seam connection member in conjunction with the encoder. The system includes a reference point detector configured to detect a plurality of reference points marked on the electrode and acquire coordinates of the reference points in conjunction with the encoder, and a roll map coordinate corrector wherein, the roll map coordinate corrector determines a roll map correction direction by comparing encoder values, calculates an electrode breakage length by comparing coordinates and corrects the coordinates of the roll map.

Abstract: A solid state battery is described, which has a negative electrode having a negative electrode active material layer including silicon (Si) as a negative electrode active material. The Si may be present as particles, e.g., microparticles, having an average particle size (D50) of 0.1 ?m to 10 ?m. The negative electrode active material layer may include the silicon (Si) in an amount of 75 wt % or more, 95 wt % or more, 99 wt % or more, or 99.9 wt % or more, based on 100 wt % of the negative electrode active material layer. The negative electrode active material layer can be free or substantially free of conductive material, carbon, solid state electrolyte, and/or binder. Preferably, after charge/discharge cycles, the negative electrode active material layer forms densified and interconnected large particles of Li—Si alloy, e.g., the Li—Si alloy may have at least one columnar structure and at least one void.

Abstract: The present disclosure relates to an apparatus for trapping a reaction by-product created by an etching process, the apparatus being configured to trap a reaction by-product contained in an unreacted gas discharged after a process is performed in an etching process chamber during a semiconductor manufacturing process, trap and stack the reaction by-product in the form of powder at a position between a vacuum pump and a scrubber through multiple flow path switching structures, multiple trapping structures, and multiple stacking structures, and discharge only a gaseous unreacted gas to the scrubber.

Abstract: An apparatus is for trapping multiple reaction by-products for a semiconductor process, in which a trapping region is divided by a difference in vertical temperature distribution according to a distance spaced apart from a heater and by structures for switching flow path directions and generating multiple vortices using a trapping structure, and reaction by-product mixtures contained in a gas, which is discharged after a process of depositing multiple different thin film layers is performed in a process chamber during a semiconductor manufacturing process, is trapped by a single trapping apparatus, such that a reaction by-product, which is aggregated in the form of a thin film in a relatively high-temperature region, is trapped by a first trapping part in an upper region, and a reaction by-product, which is aggregated in the form of powder in a relatively low-temperature region, is trapped by a second trapping part in a lower region.

Abstract: The present disclosure relates to an apparatus for trapping multiple reaction by-products for a semiconductor process, in which in order to separate, with the single trapping apparatus, reaction by-product mixtures contained in unreacted gases discharged after a process of depositing multiple different thin film layers is performed in a process chamber during a semiconductor manufacturing process, a trapping region division part is provided, which divides a heat distribution region into trapping regions for respective reaction by-products while controlling a flow in a movement direction of an introduced unreacted gas, thereby trapping a reaction by-product aggregated in the form of a thin film in a relatively high-temperature region by using a first internal trapping tower in a front region, and trapping a reaction by-product aggregated in the form of powder in a relatively low-temperature region by using a second internal trapping tower in a rear region.

Abstract: A distributed antenna system of the present invention implements duplication by a method of configuring a first headend unit and a second headend unit in an active state or in a standby state and connecting a hub unit or a remote unit to the first headend unit and the second headend unit and by a method of connecting, through a redundancy link, a hub unit or remote units of a branch group branched from and connected to each headend unit, activating the redundancy link according to the control of an active headend unit when an error occurs in a frame transmission path, and changing logical port states of a hub unit or remote units that cannot transmit frames due to the error in order to change the frame transmission path so that frame transmission is possible through the activated redundancy link.