Patents by Inventor Eun Jeong

Eun Jeong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • ISOLATION STRUCTURE AND METHOD FOR MANUFACTURING THE SAME
    Publication number: 20170186642
    Abstract: A method for manufacturing a semiconductor device includes forming a first trench and a second trench in a substrate, the first and the second trenches communicate with each other, the second trench may be formed wider than the first trench; forming a liner layer over an inner surface of the first trench and over an inner surface of the second the trench; forming a capping layer over the liner layer to form a merged overhang and a non-merged overhang, the merged overhang may be fill a top portion of the first trench, the non-merged overhang may be open a top portion of the second trench; and forming a gap-fill layer over the capping layer to fill a lower portion of the first trench and the second trench.
    Type: Application
    Filed: August 12, 2016
    Publication date: June 29, 2017
    Inventors: Eun-Jeong KIM, Jin-Yul LEE, Han-Sang SONG, Su-Ho KIM
  • PACKING BOX
    Publication number: 20170183119
    Abstract: A packing box includes first and second sidewall parts spaced apart and facing each other, first and second connecting parts, a third connecting part attaching the second connecting part to the first sidewall part, a bottom part connecting lower portions of the first and second sidewall parts and the first and second connecting parts, and a top part facing the bottom part and connecting upper portions of the first and second sidewall parts and the first and second connecting parts to form a receiving space. The top part includes first to fourth upper paperboards folded and extended from the upper portions of the first and second sidewall parts and the first and second connecting parts to form a handle, and a fifth upper paperboard folded from the third connecting part and disposed under the first to fourth upper paperboards to prevent withdrawal of contents from the receiving space.
    Type: Application
    Filed: December 22, 2016
    Publication date: June 29, 2017
    Applicant: YUHA PRINTING & PACKAGING CO., LTD.
    Inventors: Jae Hyun CHOI, Beak Jin KIM, Ji Hun JEONG, Eun Jeong KIM
  • THIN FILM TRANSISTOR ARRAY PANEL AND METHOD OF MANUFACTURING THE SAME
    Publication number: 20170170209
    Abstract: A thin film transistor array panel according to an exemplary embodiment of the present invention includes: an insulating substrate; a polycrystal semiconductor layer formed on the insulating substrate; a buffer layer formed below the polycrystal semiconductor layer and containing fluorine; a gate electrode overlapping the polycrystal semiconductor layer; a source electrode and a drain electrode overlapping the polycrystal semiconductor layer and separated from each other; and a pixel electrode electrically connected to the drain electrode.
    Type: Application
    Filed: February 28, 2017
    Publication date: June 15, 2017
    Inventors: Jung Yun JO, Ki Seong SEO, Eun Jeong CHO
  • FILAMENT WEB TYPE PRECURSOR FABRIC FOR ACTIVATED CARBON FIBER FABRIC AND METHOD FOR PREPARING SAME
    Publication number: 20170136443
    Abstract: A filament web type precursor fabric for an activated carbon fiber fabric is produced by (i) spreading precursor filaments for preparing activated carbon fiber in a web state; and (ii) punching the precursor filaments for preparing activated carbon fiber spread in a web state to entangle the precursor filaments for preparing activated carbon fiber with each other. The filament web type precursor fabric has a structure in which the precursor filaments for preparing activated carbon fiber are spread in a web form and entangled with each other, and has a weight per unit area ranging from 50 to 500 g/m2. An activated carbon fiber fabric manufactured by activating the filament web type precursor fabric contains yarns with improved and uniform durability and crystallinity, and an shows improved performance of forming microfine pores having a diameter of 1 to 2 nm.
    Type: Application
    Filed: June 11, 2015
    Publication date: May 18, 2017
    Applicant: KOLON INDUSTRIES, INC.
    Inventors: Tae Sang LEE, Eun Jeong CHO, Joon Young YOON
  • PROTECTIVE FILM
    Publication number: 20170129227
    Abstract: A protective film includes an adhesive layer containing a first synthetic resin, and a non-adhesive layer containing a second synthetic resin and micro-beads made of a polymer, the micro-beads being distributed in the second synthetic resin. The adhesive layer and the non-adhesive layer are laminated on each other.
    Type: Application
    Filed: January 25, 2017
    Publication date: May 11, 2017
    Inventors: Hae-Deuk Jeong, Eun-Jeong Shin, Sangku Moon
  • Methods of manufacturing magnetic memory device having a magnetic tunnel junction pattern
    Patent number: 9647033
    Abstract: Methods of manufacturing a magnetic memory device including forming a lower magnetic layer, a tunnel barrier layer, and an upper magnetic layer on a substrate, forming a magnetic tunnel junction (MTJ) pattern by patterning the lower magnetic layer, the tunnel barrier layer, and the upper magnetic layer, forming a first insulating layer exposing an upper surface of the MTJ pattern, forming a polymer pattern on the exposed upper surface of the MTJ pattern, forming a second insulating layer exposing an upper surface of the polymer pattern, removing the polymer pattern to form a cavity in the second insulating layer, the cavity exposing the upper surface of the MTJ pattern, and forming a metal line by filling the cavity with a conductive metal.
    Type: Grant
    Filed: December 10, 2015
    Date of Patent: May 9, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hye Min Shin, Jun Ho Park, Dae Eun Jeong
  • Thin film transistor substrate and display panel having the same
    Patent number: 9647237
    Abstract: A thin film transistor array panel device comprises: a base substrate; a barrier layer disposed over the base substrate and comprising a plurality of transparent material layers; and an array of thin film transistors disposed over the barrier layer. A difference between a refractive index of the barrier layer and a refractive index of the base substrate may be within about 6%. The transparent material layers may be arranged such that the transparent material layers having compressive residual stress and the transparent material layers having tensile residual stress are alternately stacked. Each of the transparent material layers may comprise silicon oxynitride (SiON).
    Type: Grant
    Filed: February 17, 2016
    Date of Patent: May 9, 2017
    Assignee: Samsung Display Co., Ltd.
    Inventors: Seung Ho Jung, Chaun Gi Choi, Hye Young Park, Eun Young Lee, Joo Hee Jeon, Eun Jeong Cho, Bo Geon Jeon, Yung Bin Chung
  • Semiconductor device having dual work function gate structure, method for fabricating the same, transistor circuit having the same, memory cell having the same, and electronic device having the same
    Patent number: 9634109
    Abstract: A semiconductor device including a substrate in which a trench is formed, a first impurity region and a second impurity region formed in the substrate separated from each other by the trench, a gate electrode formed to fill a lower part of the trench, and a capping layer formed over the gate electrode to fill an upper part of the trench. The gate electrode includes a first work function liner formed over a bottom surface and sidewalls of the lower part of the trench without overlapping with the first impurity region and the second impurity region, and including an aluminum-containing metal nitride; and a second work function liner formed over the sidewalls of the lower part of the trench over the first work function liner, overlapping with the first impurity region and the second impurity region, and including a silicon-containing non-metal material.
    Type: Grant
    Filed: October 28, 2016
    Date of Patent: April 25, 2017
    Assignee: SK Hynix Inc.
    Inventors: Tae-Kyung Oh, Jin-Yul Lee, Eun-Jeong Kim, Dong-Soo Kim
  • POS PERIPHERALS CONTROLLING DEVICE, MOBILE HOST DEVICE, AND CONTROL METHOD THEREOF
    Publication number: 20170109721
    Abstract: Provided is a POS peripherals controlling device including: a wireless communication unit; an interface part including at least one interface unit; and a controller determining whether data received from a mobile POS host device through the wireless communication unit includes control data for controlling at least one POS peripheral connected through the interface part, when the received data includes control data, checking a target POS peripheral where the control data is to be delivered among the at least one peripheral, and transmitting control data included in the received data to the checked POS peripheral through a first interface unit connected to the checked target peripheral among the at least one interface unit, wherein the control data is generated by the mobile POS host device and is generated in a format corresponding to the target peripheral that is to receive the control data.
    Type: Application
    Filed: December 30, 2016
    Publication date: April 20, 2017
    Applicant: BIXOLON CO., LTD.
    Inventors: Ji Hwan KIM, Won Je CHOI, Sa Bin SON, Cho Eun JEONG
  • LIQUID CRYSTAL DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME
    Publication number: 20170110481
    Abstract: Provided are liquid crystal display and the method for manufacturing the same. According to an aspect of the present invention, there is provided a liquid crystal display device, including a first substrate; a gate electrode disposed on the first substrate; a semiconductor pattern layer disposed on the gate electrode; and a source electrode and a drain electrode disposed on the semiconductor pattern layer and facing each other, wherein a diffusion prevention pattern is disposed on the semiconductor pattern layer to prevent diffusion into the semiconductor pattern layer or to maintain uniform thickness of the semiconductor pattern layer.
    Type: Application
    Filed: April 15, 2016
    Publication date: April 20, 2017
    Inventors: Yung Bin CHUNG, Bo Geon JEON, Eun Jeong CHO, Tae Young AHN, Woo Seok JEON, Sung Hoon YANG
  • Method of manufacturing a magnetic memory device
    Patent number: 9627609
    Abstract: A method of manufacturing a magnetic memory device may include forming a lower magnetic layer, a tunnel barrier layer, and an upper magnetic layer on a substrate, forming a magnetic tunnel junction pattern by etching a stacked structure including the lower magnetic layer, the tunnel barrier layer, and the upper magnetic layer, forming a boron-absorption layer covering the magnetic tunnel junction pattern, and performing a heat treatment process so that boron included in the upper and lower magnetic layers may be absorbed by the boron-absorption layer. The heat treatment process may be undertaken in a gaseous atmosphere including at least one of hydrogen, oxygen, and nitrogen.
    Type: Grant
    Filed: August 9, 2015
    Date of Patent: April 18, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD
    Inventor: Dae Eun Jeong
  • SUBSTRATE STRUCTURE
    Publication number: 20170104048
    Abstract: A substrate structure may be used in a display device. The substrate structure may include a base substrate, a transistor, and a silicon oxynitride layer. The transistor may include a semiconductor member and a gate electrode and may overlap the base substrate. The silicon oxynitride layer may directly contact at least one of the base substrate, the semiconductor member, and the gate electrode and may include (and/or contain) a hydrogen atom set. A hydrogen concentration in the silicon oxynitride layer may be greater than or equal to 1.52 atomic percent.
    Type: Application
    Filed: July 14, 2016
    Publication date: April 13, 2017
    Inventors: Yung-Bin CHUNG, Bo-Geon JEON, Eun-Jeong CHO, Hye-Hyang PARK, Sung-Hoon YANG, Woo-Seok JEON, Joo-Hee JEON, Chaun-Gi CHOI
  • Thin film transistor array panel and method of manufacturing the same
    Patent number: 9614092
    Abstract: A thin film transistor array panel according to an exemplary embodiment of the present invention includes: an insulating substrate; a polycrystal semiconductor layer formed on the insulating substrate; a buffer layer formed below the polycrystal semiconductor layer and containing fluorine; a gate electrode overlapping the polycrystal semiconductor layer; a source electrode and a drain electrode overlapping the polycrystal semiconductor layer and separated from each other; and a pixel electrode electrically connected to the drain electrode.
    Type: Grant
    Filed: October 9, 2015
    Date of Patent: April 4, 2017
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Jung Yun Jo, Ki Seong Seo, Eun Jeong Cho
  • Chip electronic component and board having the same
    Patent number: 9583251
    Abstract: There is provided a chip electronic component including: a magnetic body containing magnetic metal powder particles and a thermosetting resin; an internal coil part embedded in the magnetic body; and a surface protection layer with which a surface of the magnetic body is coated. The surface protection layer may prevent a plating spreading phenomenon occurring on a surface of the chip electronic component at the time of forming external electrodes.
    Type: Grant
    Filed: April 14, 2015
    Date of Patent: February 28, 2017
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Je Ik Moon, Sung Soo Kim, Tae Young Kim, Ye Eun Jeong, Jong Hun Kim, Seong Min Chin
  • SEMICONDUCTOR DEVICE HAVING DUAL WORK FUNCTION GATE STRUCTURE, METHOD FOR FABRICATING THE SAME, TRANSISTOR CIRCUIT HAVING THE SAME, MEMORY CELL HAVING THE SAME, AND ELECTRONIC DEVICE HAVING THE SAME
    Publication number: 20170047421
    Abstract: A semiconductor device including a substrate in which a trench is formed, a first impurity region and a second impurity region formed in the substrate separated from each other by the trench, a gate electrode formed to fill a lower part of the trench, and a capping layer formed over the gate electrode to fill an upper part of the trench. The gate electrode includes a first work function liner formed over a bottom surface and sidewalls of the lower part of the trench without overlapping with the first impurity region and the second impurity region, and including an aluminum-containing metal nitride; and a second work function liner formed over the sidewalls of the lower part of the trench over the first work function liner, overlapping with the first impurity region and the second impurity region, and including a silicon-containing non-metal material.
    Type: Application
    Filed: October 28, 2016
    Publication date: February 16, 2017
    Inventors: Tae-Kyung OH, Jin-Yul LEE, Eun-Jeong KIM, Dong-Soo KIM
  • Side Stream Flow Type Reverse Osmosis Membrane Filter
    Publication number: 20170036168
    Abstract: Disclosed is a side stream flow-type reverse osmosis membrane filter with an increased purified water recovery rate. The filter comprises: a filter housing with a raw water port, a purified water port, and a concentrated water port; an RO filter to purify raw water, thereby sending purified water to an inside thereof and discharging concentrated water, which is filtered out; a central tube for collecting the purified water; a raw water pipe arranged in the central tube and provided with a raw water flow channel in a center portion thereof, with a purified water flow channel formed between the raw water pipe and the central tube; and a raw water distributor for supplying supply a portion of raw water to the upper end of the RO filter and a portion of the raw water the lower end of the RO filter and supplying the purified water to the purified water port.
    Type: Application
    Filed: April 15, 2015
    Publication date: February 9, 2017
    Inventors: Sung Taek LIM, Hyun Ki HONG, Ju Song HUR, Jong Ho KONG, Hyun Sup SHIN, Tae Ho CHUNG, Sue Hyun CHOI, Go Eun JEONG
  • Porous structure for forming anti-fingerprint coating, method of forming anti-fingerprint coating, substrate comprising the anti-finger-print coating formed by the method, and product comprising the substrate
    Patent number: 9556341
    Abstract: Provided are a porous structure for forming anti-fingerprint coating capable of providing a self-cleaning function to a surface of a substrate, a method of forming anti-fingerprint coating using the same, an anti-fingerprint coated substrate prepared by the same method, and a product including the same. When the porous structure including a lipolytic enzyme is formed on the surface of the substrate, contaminants decomposed by an enzyme are absorbed into a pore, and thus anti-fingerprint coating may be more effectively performed to remove detectable contamination from a surface of the substrate. As a result, contamination by fingerprints on the surface of a display device, the appearance of an electronic device, or building materials can be effectively reduced.
    Type: Grant
    Filed: September 17, 2010
    Date of Patent: January 31, 2017
    Assignee: LG Chem, Ltd.
    Inventors: Eun Jeong Lee, Young Jun Hong, Hyeon Choi, Taek Ho Yang
  • LOW LATENCY TRANSMISSION METHOD AND APPARATUS
    Publication number: 20170013618
    Abstract: A base station supports a low latency mode of a terminal through a legacy downlink subframe transmitted in a first transmission time interval (TTI) unit in a downlink primary component carrier, and transmits control information and low latency downlink data to the terminal operated in the low latency mode through a downlink subslot transmitted in a second TTI unit in a downlink secondary component carrier.
    Type: Application
    Filed: July 8, 2016
    Publication date: January 12, 2017
    Inventor: Eun-Jeong SHIN
  • Cosmetic vessel
    Patent number: D775966
    Type: Grant
    Filed: September 9, 2015
    Date of Patent: January 10, 2017
    Assignee: LG HOUSEHOLD & HEALTH CARE LTD.
    Inventor: Song Eun Jeong
  • Cosmetic vessel
    Patent number: D782912
    Type: Grant
    Filed: May 31, 2016
    Date of Patent: April 4, 2017
    Assignee: LG HOUSEHOLD & HEALTH CARE LTD.
    Inventor: Song Eun Jeong