Patents by Inventor Eunji PAK

Eunji PAK has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230394292
    Abstract: Disclosed herein are a method and apparatus for synchronizing neuromorphic processing units. The method for synchronizing neuromorphic processing units includes calculating a time length maximizing a likelihood probability distribution or a posterior probability distribution based on a multi-dimensional variable influencing a change in a time length used by a neuromorphic processing unit to perform an operation, generating a lookup table based on the multi-dimensional variable and the time length maximizing the likelihood probability distribution or the posterior probability distribution for the multi-dimensional variable, and updating the lookup table based on the time length used by the neuromorphic processing unit to perform the operation and the time length maximizing the likelihood probability distribution or the posterior probability distribution.
    Type: Application
    Filed: December 7, 2022
    Publication date: December 7, 2023
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Youngmok HA, Eunji PAK, Yongjoo KIM, Taeho KIM
  • Publication number: 20230206048
    Abstract: Disclosed herein are a crossbar-based neuromorphic computing apparatus capable of processing large input neurons and a method using the same. The neuromorphic computing method includes comparing a maximum number of axons in which a size of a crossbar of a hardware-based node is considered with a number of input neurons, when the number of input neurons exceeds the maximum number of axons, grouping some of input neurons in consideration of the maximum number of axons, obtaining a spike output for a generated group, and inputting the spike output, together with remaining input neurons that are not included in the group, to any one node, and then processing the spike output.
    Type: Application
    Filed: December 7, 2022
    Publication date: June 29, 2023
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Yongjoo KIM, Eunji PAK, Youngmok HA, Taeho KIM
  • Patent number: 10503230
    Abstract: Disclosed herein are a method and apparatus for power scheduling. The disclosed method is a power scheduling method of a power-scheduling apparatus for controlling a partition for at least one application, and the method includes setting a power limit for each partition, monitoring the power consumed by each partition in real time, and when power consumption exceeding the power limit is sensed in any partition as a result of monitoring, controlling an operation for the corresponding partition.
    Type: Grant
    Filed: November 25, 2016
    Date of Patent: December 10, 2019
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Hyunwoo Joe, Eunji Pak, Taeho Kim, Chaedeok Lim
  • Publication number: 20170149277
    Abstract: Disclosed herein are a method and apparatus for power scheduling. The disclosed method is a power scheduling method of a power-scheduling apparatus for controlling a partition for at least one application, and the method includes setting a power limit for each partition, monitoring the power consumed by each partition in real time, and when power consumption exceeding the power limit is sensed in any partition as a result of monitoring, controlling an operation for the corresponding partition.
    Type: Application
    Filed: November 25, 2016
    Publication date: May 25, 2017
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Hyunwoo JOE, Eunji PAK, Taeho KIM, Chaedeok LIM
  • Publication number: 20170052891
    Abstract: The present invention relates to a multi-core processor system and a method for managing a shared cache in the system. The multi-core processor system in accordance with an embodiment of the present invention includes a plurality of cores, a shared cache, a scheduler configured to assign a plurality of tasks to the cores based on a criticality of the tasks, and a cache manager configured to control use of the shared cache by each of the cores based on the criticality of the tasks assigned to the cores.
    Type: Application
    Filed: July 14, 2016
    Publication date: February 23, 2017
    Inventors: Eunji PAK, Hyunwoo JOE, Taeho KIM