Patents by Inventor Eun Ji YOUN

Eun Ji YOUN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11538432
    Abstract: An input stage configured to differentially amplify an input signal and an output signal, a first current mirror and a second current mirror configured to receive a differential current from the input stage, an output stage including first and second output transistors, respectively including a gate connected to the first and second current mirrors, and a slew rate compensation circuit configured to (i) mirror a comparison current generated by comparing a voltage of a first input signal with a voltage of a second input signal, and (ii) provide the mirrored comparison current to the gate of the first or second output transistor.
    Type: Grant
    Filed: December 15, 2021
    Date of Patent: December 27, 2022
    Assignee: DB HiTek, Co., Ltd.
    Inventors: Hak Jin Jung, Eun Ji Youn, Pyung Sik Ma
  • Publication number: 20220238081
    Abstract: An input stage configured to differentially amplify an input signal and an output signal, a first current mirror and a second current mirror configured to receive a differential current from the input stage, an output stage including first and second output transistors, respectively including a gate connected to the first and second current mirrors, and a slew rate compensation circuit configured to (i) mirror a comparison current generated by comparing a voltage of a first input signal with a voltage of a second input signal, and (ii) provide the mirrored comparison current to the gate of the first or second output transistor.
    Type: Application
    Filed: December 15, 2021
    Publication date: July 28, 2022
    Inventors: Hak Jin JUNG, Eun Ji YOUN, Pyung Sik MA