Abstract: An image sensing device and an operating method thereof. The image sensing device includes a ramp signal generation circuit suitable for generating a ramp signal which corresponds to an analog gain, based on a main bias voltage, a cascode bias voltage and a plurality of ramp code signals, a bias voltage generation circuit suitable for generating the main bias voltage and the cascode bias voltage according to the analog gain, and a boost circuit suitable for boosting an output terminal of the cascode bias voltage according to the analog gain.

Abstract: A ramp voltage generator includes: a ramping cell array including a plurality of ramping current cells; a calibration cell array including a plurality of calibration current cells; and a current-voltage converter suitable for converting a current supplied from activated ramping current cells among the ramping current cells and activated calibration current cells among the calibration current cells into a voltage to generate a ramp voltage.

Abstract: A ramp voltage generator includes: a ramping cell array including a plurality of ramping current cells; a calibration cell array including a plurality of calibration current cells; and a current-voltage converter suitable for converting a current supplied from activated ramping current cells among the ramping current cells and activated calibration current cells among the calibration current cells into a voltage to generate a ramp voltage.

Abstract: An image sensor comprises a pixel array including a plurality of pixels where a plurality of columns and a plurality of rows are arranged, a read-out circuit generating image data using pixel signals output from pixels corresponding to a row selected from among the plurality of rows, and a plurality of gain adjustment lines provided for every plurality of columns and adjusting gains of pixels of their respective corresponding columns.

Abstract: An image sensing device and an operating method thereof. The image sensing device includes a ramp signal generation circuit suitable for generating a ramp signal which corresponds to an analog gain, based on a main bias voltage, a cascode bias voltage and a plurality of ramp code signals, a bias voltage generation circuit suitable for generating the main bias voltage and the cascode bias voltage according to the analog gain, and a boost circuit suitable for boosting an output terminal of the cascode bias voltage according to the analog gain.

Abstract: A CMOS image sensor includes an active pixel array suitable for generating an active pixel signal, a dummy pixel array suitable for generating a dummy pixel signal, a row driver suitable for controlling the active pixel array and the dummy pixel array to simultaneously operate at a same column, and a correlated double sampling (CDS) array suitable for generating an active sampling signal and a dummy sampling signal, which are sampled from the active pixel signal and the dummy pixel signal by using a correlated double sampling, respectively, based on a first ramp signal and a second ramp signal, and comparing the active sampling signal with the dummy sampling signal.

Abstract: A CMOS image sensor includes an active pixel array suitable for generating an active pixel signal, a dummy pixel array suitable for generating a dummy pixel signal, a row driver suitable for controlling the active pixel array and the dummy pixel array to simultaneously operate at a same column, and a correlated double sampling (CDS) array suitable for generating an active sampling signal and a dummy sampling signal, which are sampled from the active pixel signal and the dummy pixel signal by using a correlated double sampling, respectively, based on a first ramp signal and a second ramp signal, and comparing the active sampling signal with the dummy sampling signal.

Abstract: An image sensor includes: a plurality of image pixels providing a reset signal and a data signal; a signal providing apparatus generating a ramp signal, and sequentially providing the reset signal, the data signal, and the ramp signal; and an analog-to-digital converting apparatus converting the data signal into a digital signal by using a first timing at which the amplitude of the ramp signal is changed based on the amplitude of the reset signal and a second timing at which the amplitude of the ramp signal is changed based on the amplitude of the data signal, wherein the reset signal used to generate the ramp signal and the data signal which has been converted into the data digital signal may be output from the same image pixel.

Abstract: An image sensor includes, inter alia: a first and second capacitors arranged serially between an input terminal and a first node, a first comparing unit connecting to a first reference signal and a connecting node of the first and second capacitors, and an output terminal connecting to the first node wherein the first comparing unit provides first or second preliminary ramp signals on the first node, first and second switches arranged between the first comparing unit and the first capacitor to selectively connect the first capacitor to a ground voltage or the input terminal, a third capacitor connecting to the second capacitor in parallel, a third switch selectively connecting the first node to the third capacitor, a first ramp signal output unit generating a first ramp signal with the first preliminary ramp signal provided, and a second ramp signal output unit generating a second ramp signal using the second preliminary ramp signal.

Abstract: An image sensing device includes, inter alia, a ramp signal generation unit generating a ramp signal that decreases during first and second periods for finding data values corresponding to a pixel signal and an offset value, respectively. The image sensing device also includes a comparison unit compares the pixel signal with the ramp signal during the first period, and compares the ramp signal with an internally generated offset value during the second period. A first counting unit is configured to perform a counting operation during the first period, and a second counting unit configured to latch a count value of the first counting unit as a data value in response to the result of the first comparison operation during the first period, perform a down-count operation from the latched data value in response to the result of the second comparison operation during the second period, and latch a counting result.

Abstract: An image sensor includes, inter alia: a first and second capacitors arranged serially between an input terminal and a first node, a first comparing unit connecting to a first reference signal and a connecting node of the first and second capacitors, and an output terminal connecting to the first node wherein the first comparing unit provides first or second preliminary ramp signals on the first node, first and second switches arranged between the first comparing unit and the first capacitor to selectively connect the first capacitor to a ground voltage or the input terminal, a third capacitor connecting to the second capacitor in parallel, a third switch selectively connecting the first node to the third capacitor, a first ramp signal output unit generating a first ramp signal with the first preliminary ramp signal provided, and a second ramp signal output unit generating a second ramp signal using the second preliminary ramp signal.

Abstract: An image sensing device includes, inter alia, a ramp signal generation unit generating a ramp signal that decreases during first and second periods for finding data values corresponding to a pixel signal and an offset value, respectively. The image sensing device also includes a comparison unit compares the pixel signal with the ramp signal during the first period, and compares the ramp signal with an internally generated offset value during the second period. A first counting unit is configured to perform a counting operation during the first period, and a second counting unit configured to latch a count value of the first counting unit as a data value in response to the result of the first comparison operation during the first period, perform a down-count operation from the latched data value in response to the result of the second comparison operation during the second period, and latch a counting result.