Patents by Inventor Eun-Mi Hong
Eun-Mi Hong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20200354794Abstract: The present invention relates to a method for determining sensitivity to a simultaneous inhibitor against poly ADP ribose polymerase (PARP) and Tankyrase. According to the present invention, a colorectal treatment effect can be maximized by sorting patients having sensitivity to the simultaneous inhibitor against PARP and Tankyrase.Type: ApplicationFiled: May 12, 2020Publication date: November 12, 2020Inventors: Dong Hoon Jin, Seung Woo Hong, Jai Hee Moon, Jae Sik Shin, Seung Mi Kim, Dae Hee Lee, Eun Young Lee, Jung Shin Lee, Bong Choel Kim
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Patent number: 10717991Abstract: The present invention relates to a transgenic pig in which an immune rejection response is suppressed during xenotransplantation, wherein a gene coding for heme oxygenase-1 (HO-1) and a gene coding for tumor necrosis factor receptor 1-Fc (TNFR1-Fc) are simultaneously expressed and a gene coding for ?-1,3-galactosyltransferase (GGTA1) is knocked out; and a method for producing the same.Type: GrantFiled: November 11, 2016Date of Patent: July 21, 2020Assignees: CHONG KUN DANG PHARMACEUTICAL CORP., SEOUL NATIONAL UNIVERSITY R&DB FOUNDATIONInventors: Byeong Chun Lee, Curie Ahn, Geon A Kim, Su Cheong Yeom, Su Jin Kim, Bumrae Cho, Eun Mi Lee, Sang Hoon Lee, In Chang Hwang, Hye Jin Hong
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Publication number: 20200190143Abstract: According to aspects of the present invention, a peptide with any one sequence of SEQ ID NOS:1 to 3 exhibits high selective binding affinity to a target and the microcapsule has superior physicochemical stability. Therefore, the cosmetic composition containing the microcapsule linked to the peptide manifests high delivery efficiency of an active ingredient included in the capsule to target cells, thereby exhibiting superior skin-condition improvement effects.Type: ApplicationFiled: January 19, 2018Publication date: June 18, 2020Inventors: Sang Keun HAN, Hyun Sook LEE, Eun Ah KIM, Seung Min HYUN, Hyeong CHOI, So Yoon BAEK, Jae Hwa HONG, Chae Mi LIM, Da Jeong BAK, Hye Jin JO, Hak Sung LEE, Ji Hun PARK, Eun Young LEE
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Patent number: 10683553Abstract: The present invention relates to a method for determining sensitivity to a simultaneous inhibitor against poly ADP ribose polymerase (PARP) and Tankyrase. According to the present invention, a colorectal treatment effect can be maximized by sorting patients having sensitivity to the simultaneous inhibitor against PARP and Tankyrase.Type: GrantFiled: July 6, 2016Date of Patent: June 16, 2020Assignee: THE ASAN FOUNDATIONInventors: Dong Hoon Jin, Seung Woo Hong, Jai Hee Moon, Jae Sik Shin, Seung Mi Kim, Dae Hee Lee, Eun Young Lee, Jung Shin Lee, Bong Choel Kim
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Publication number: 20200121749Abstract: The present invention provides a pharmaceutical composition for prevention or treatment of a stress disease and depression, the pharmaceutical composition be safely useable without toxicity and side effects by using an extract of leaves of Vaccinium bracteatum Thunb., which is natural resource of Korea, so that the reduction of manufacturing and production costs and the import substitution and export effects can be expected through the replacement of a raw material for preparation with a plant inhabiting in nature.Type: ApplicationFiled: February 7, 2018Publication date: April 23, 2020Inventors: Chul Yung CHOI, Dool Ri OH, Yu Jin KIM, Eun Jin CHOI, Hyun Mi LEE, Dong Hyuck BAE, Kyo Nyeo OH, Myung-A JUNG, Ji Ae HONG, Kwang Su KIM, Hu Won KANG, Jae Yong KIM, Sang O PAN, Sung Yoon PARK, Rack Seon SEONG
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Patent number: 10489598Abstract: A system for diagnosing and analyzing infrastructure, comprising: a storage unit storing a diagnostic script, which is for collecting system information from a target system or at least one target operating server of the target system; a script transmission unit transmitting the diagnostic script to the target system to diagnose the target system; a system information collection unit receiving the system information from the target system or the at least one target operating server as a result of the running of the diagnostic script; an analysis engine storage unit storing at least one analysis rule corresponding to the target system or the at least one target operating server; and an analysis information generation unit analyzing the system information by using the analysis rule, and generating analysis information regarding the target system and the at least one target operating server based on the results of the analyzing.Type: GrantFiled: March 2, 2017Date of Patent: November 26, 2019Assignee: SAMSUNG SDS CO., LTD.Inventors: In Chul Han, Seung Youl Maeng, Sung Hwan Choi, Min Ho Sung, Ji Yun Lee, Do San Pyun, Young Beom Seo, Seong Dae Song, Eun Young Kim, Sung Soon Hong, Jeong A Choi, Yoo Mi Kwon, Chang Won Park, Mun Hwan Kim
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Publication number: 20190328868Abstract: The present invention relates to a herpes zoster vaccine composition, which comprises glycoprotein E of Varicella zoster virus, a glucopyranosyl lipid adjuvant, and a metabolic oil, and selectively increases a cell-mediated immune reaction without having disadvantages of attenuated live vaccines, thereby exhibit high safety and a high preventive effect against herpes zoster.Type: ApplicationFiled: December 20, 2017Publication date: October 31, 2019Applicants: MOGAM INSTITUTE FOR BIOMEDICAL RESEARCH, INFECTIOUS DISEASE RESEARCH INSTITUTEInventors: Hyo Jung NAM, Eun Mi KIM, Duck Hyang SHIN, Steven G. REED, Kang Il YOO, Sung Jun HONG
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Patent number: 10344102Abstract: Provided is an olefin-based polymer with excellent processability. The olefin-based polymer according to the present invention has a high molecular weight and a broad molecular weight distribution to show excellent processability and improved mechanical properties, thereby being usefully applied according to the intended use.Type: GrantFiled: September 4, 2015Date of Patent: July 9, 2019Assignee: LG CHEM, LTD.Inventors: Joong Soo Kim, Yu Taek Sung, Ki Soo Lee, Dae Sik Hong, Ki Heon Song, Eun Kyoung Song, Heon Yong Kwon, Yong Ho Lee, Dong Hoon Jeong, Soon Ho Sun, Sun Mi Kim
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Patent number: 9815840Abstract: The present invention relates to a pyrrolopyridazine derivative represented by Formula 1 of the detailed description, or a pharmaceutically acceptable salt thereof. The compound according to the present invention and a pharmaceutically acceptable salt thereof can inhibit the activity of protein kinase(s), and thus are useful for preventing or treating diseases related thereto.Type: GrantFiled: August 29, 2014Date of Patent: November 14, 2017Assignee: The Asan FoundationInventors: Tae Gon Baik, Won-Hyuk Jung, Seung In Kim, Seung Chan Kim, Sook Kyung Park, Su Yeon Jung, Seung Hee Ji, So Young Ki, Min Cheol Kim, Eun Young Lee, Eun Mi Hong
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Publication number: 20160207931Abstract: The present invention relates to a pyrrolopyridazine derivative represented by Formula 1 of the detailed description, or a pharmaceutically acceptable salt thereof. The compound according to the present invention and a pharmaceutically acceptable salt thereof can inhibit the activity of protein kinase(s), and thus are useful for preventing or treating diseases related thereto.Type: ApplicationFiled: August 29, 2014Publication date: July 21, 2016Applicant: CJ Healthcare CorporationInventors: Tae Gon BAIK, Won-Hyuk JUNG, Seung In KIM, Seung Chan KIM, Sook Kyung PARK, Su Yeon JUNG, Seung Hee JI, So Young KI, Min Cheol KIM, Eun Young LEE, Eun Mi HONG
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Patent number: 7968405Abstract: A method of manufacturing a nonvolatile memory device is provided. The method includes forming an isolation layer in a semiconductor substrate defining an active region and forming a molding pattern on the isolation layer. A first conductive layer is formed on a sidewall and a top surface of the molding pattern and on the semiconductor substrate. The first conductive layer on the top surface of the molding pattern is selectively removed forming a conductive pattern. The conductive pattern includes a body plate disposed on the active region and a protrusion which extends from an edge of the body plate onto the sidewall of the molding pattern. The molding pattern is then removed. An inter-gate dielectric layer is formed on the isolation layer and the conductive pattern. Nonvolatile memory devices manufactured using the method are also provided.Type: GrantFiled: February 6, 2008Date of Patent: June 28, 2011Assignee: Samsung Electronics Co., Ltd.Inventors: Eun-Mi Hong, Kwang-Tae Kim, Ji-Hoon Park
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Patent number: 7863110Abstract: A semiconductor device includes a device isolation layer on a semiconductor substrate defining an active region in the semiconductor substrate, a low voltage well of a first conductivity type in the active region of the semiconductor substrate, a high voltage impurity region of a second conductivity type in the active region of the semiconductor substrate, the high voltage impurity region positioned in an upper portion of the low voltage well, a high concentration impurity region of the second conductivity type within the high voltage impurity region and spaced apart from the device isolation layer, and a floating impurity region of the first conductivity type between the device isolation layer and the high concentration impurity region, the floating impurity region being a portion of an upper surface of the active region.Type: GrantFiled: October 19, 2007Date of Patent: January 4, 2011Assignee: Samsung Electronics Co., Ltd.Inventors: Tea-Kwang Yu, Kong-Sam Jang, Kwang-Tae Kim, Ji-Hoon Park, Eun-Mi Hong
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Publication number: 20080197401Abstract: A method of manufacturing a nonvolatile memory device is provided. The method includes forming an isolation layer in a semiconductor substrate defining an active region and forming a molding pattern on the isolation layer. A first conductive layer is formed on a sidewall and a top surface of the molding pattern and on the semiconductor substrate. The first conductive layer on the top surface of the molding pattern is selectively removed forming a conductive pattern. The conductive pattern includes a body plate disposed on the active region and a protrusion which extends from an edge of the body plate onto the sidewall of the molding pattern. The molding pattern is then removed. An inter-gate dielectric layer is formed on the isolation layer and the conductive pattern. Nonvolatile memory devices manufactured using the method are also provided.Type: ApplicationFiled: February 6, 2008Publication date: August 21, 2008Inventors: Eun-Mi Hong, Kwang-Tae Kim, Ji-Hoon Park
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Publication number: 20080130367Abstract: A nonvolatile memory device includes a semiconductor well region of first conductivity type on a semiconductor substrate and a common source diffusion region of second conductivity type extending in the semiconductor well region and forming a P-N rectifying junction therewith. A byte-erasable EEPROM memory array is provided in the semiconductor well region. This byte-erasable EEPROM memory array is configured to support independent erasure of first and second pluralities of EEPROM memory cells therein that are electrically connected to the common source diffusion region.Type: ApplicationFiled: February 7, 2008Publication date: June 5, 2008Inventors: Sung-Taeg Kang, Hee-Seog Jeon, Jeong-Uk Han, Chang-Hun Lee, Bo-Young Seo, Chang-Min Jeon, Eun-Mi Hong
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Publication number: 20080093701Abstract: A semiconductor device includes a device isolation layer on a semiconductor substrate defining an active region in the semiconductor substrate, a low voltage well of a first conductivity type in the active region of the semiconductor substrate, a high voltage impurity region of a second conductivity type in the active region of the semiconductor substrate, the high voltage impurity region positioned in an upper portion of the low voltage well, a high concentration impurity region of the second conductivity type within the high voltage impurity region and spaced apart from the device isolation layer, and a floating impurity region of the first conductivity type between the device isolation layer and the high concentration impurity region, the floating impurity region being a portion of an upper surface of the active region.Type: ApplicationFiled: October 19, 2007Publication date: April 24, 2008Inventors: Tea-Kwang Yu, Kong-Sam Jang, Kwang-Tae Kim, Ji-Hoon Park, Eun-Mi Hong
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Publication number: 20070091682Abstract: A nonvolatile memory device includes a semiconductor well region of first conductivity type on a semiconductor substrate and a common source diffusion region of second conductivity type extending in the semiconductor well region and forming a P-N rectifying junction therewith. A byte-erasable EEPROM memory array is provided in the semiconductor well region. This byte-erasable EEPROM memory array is configured to support independent erasure of first and second pluralities of EEPROM memory cells therein that are electrically connected to the common source diffusion region.Type: ApplicationFiled: June 28, 2006Publication date: April 26, 2007Inventors: Sung-Taeg Kang, Hee-Seog Jeon, Jeong-Uk Han, Chang-Hun Lee, Bo-Young Seo, Chang-Min Jeon, Eun-Mi Hong