Patents by Inventor Eun Rhee

Eun Rhee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250024074
    Abstract: A method of encoding a dynamic mesh includes creating a base mesh through mesh decimation, subdividing the base mesh, extracting displacement information for the subdivided mesh, and encoding the base mesh and the displacement information. In this instance, mesh subdivision information for subdivision of the base mesh is encoded and signaled.
    Type: Application
    Filed: July 12, 2024
    Publication date: January 16, 2025
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Da Yun NAM, Seong Yong LIM, Hyun Cheol KIM, Chae Eun RHEE, Yong Wook SEO, Hyun Min JUNG
  • Publication number: 20240233193
    Abstract: The present invention relates to a method and apparatus for encoding a displacement video using image tiling. A method for encoding multi-dimensional data according to an embodiment of the present disclosure may comprise: converting the multi-dimensional data into one or more frames with two-dimensional characteristics; generating one or more frame groups by grouping the one or more frames with pre-configured number units; reconstructing frames belonging to each frame group into a tiled frame; and generating a bitstream by encoding the tiled frame. Here, the tiled frame may be constructed with one or more blocks, and each block may be constructed by rearranging pixels existing at the same location in the frames.
    Type: Application
    Filed: October 18, 2023
    Publication date: July 11, 2024
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Da Yun NAM, Hyun Cheol KIM, Jeong Il SEO, Seong Yong LIM, Chae Eun RHEE, Gwang Cheol RYU, Yong Wook SEO, Hyun Min JUNG
  • Publication number: 20240135595
    Abstract: The present invention relates to a method and apparatus for encoding a displacement video using image tiling. A method for encoding multi-dimensional data according to an embodiment of the present disclosure may comprise: converting the multi-dimensional data into one or more frames with two-dimensional characteristics; generating one or more frame groups by grouping the one or more frames with pre-configured number units; reconstructing frames belonging to each frame group into a tiled frame; and generating a bitstream by encoding the tiled frame. Here, the tiled frame may be constructed with one or more blocks, and each block may be constructed by rearranging pixels existing at the same location in the frames.
    Type: Application
    Filed: October 17, 2023
    Publication date: April 25, 2024
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Da Yun NAM, Hyun Cheol KIM, Jeong Il SEO, Seong Yong LIM, Chae Eun RHEE, Gwang Cheol RYU, Yong Wook SEO, Hyun Min JUNG
  • Publication number: 20240121371
    Abstract: An image processing method includes obtaining a plurality of main images for a plurality of light field images captured from different viewpoints, generating a depth map representing depth information of the plurality of light field images, based on the plurality of main images, generating a plurality of prediction images for the plurality of light field images, based on the plurality of main images, generating a plurality of residual images representing a difference between the plurality of light field images and the plurality of prediction images, and generating a micro image based on the depth map and the plurality of residual images.
    Type: Application
    Filed: October 3, 2023
    Publication date: April 11, 2024
    Applicant: INHA UNIVERSITY RESEARCH AND BUSINESS FOUNDATION
    Inventors: Chae Eun RHEE, Hyun Min Jung
  • Patent number: 11869137
    Abstract: The electronic apparatus includes a memory stored with a multiple light field unit (LFU) structure in which a plurality of light fields is arranged in a lattice structure, and a processor configured to, based on a view position within the lattice structure being determined, generate a 360-degree image based on the view position by using the multiple LFU structure, and the processor is configured to select an LFU to which the view position belongs from among the multiple LFU structure, allocate a rendering field-of-view (FOV) in predetermined degrees based on the view position, generate a plurality of view images based on a plurality of light fields comprising the selected LFU and the allocated FOV, and generate the 360-degree image by incorporating the generated plurality of view images.
    Type: Grant
    Filed: August 12, 2020
    Date of Patent: January 9, 2024
    Assignee: INHA UNIVERSITY RESEARCH AND BUSINESS FOUNDATION
    Inventors: Chae Eun Rhee, Hyunmin Jung, Hyuk-Jae Lee
  • Patent number: 11755898
    Abstract: Provided is a hybrid near-memory processing system including a GPU, a PIM-HBM, a CPU, and a main memory. An embedding vector is loaded through the GPU and the PIM-HBM, an embedding table is divided and stored in the main memory and the HBM in a training process for inference of a recommendation system, an embedding lookup operation is performed in the main memory or the HBM according to a location of a necessary embedding vector in an inference process of the recommendation system, an additional embedding manipulation operation is performed in the CPU and the PIM with respect to the embedding vector of which the embedding lookup operation is completed, embedding vectors processed through embedding manipulation are finally concatenated in the PIM to generate an embedding result, and the embedding result is transmitted to the GPU to derive a final inference result through a top multiplayer perceptron (MLP) process.
    Type: Grant
    Filed: April 27, 2023
    Date of Patent: September 12, 2023
    Assignee: Inha University Research and Business Foundation
    Inventors: Chae Eun Rhee, Myungkeun Cho
  • Patent number: 8835164
    Abstract: Disclosed are a cell line that expresses protein of Seq. No. 1, and a method for screening an anticancer compound of uterine cervical cancer by using the same. The stable cell line that expresses oncoprotein E6 of a human papillomavirus type 16 variant strain is used to determine a difference in amounts of expression of tumor suppressor genes, such as p53, between E6 protein of the reference strain and E6 protein of a variant strain, thereby screening an anticancer compound of uterine cervical cancer, etc. Further, it is possible to develop an anticancer agent of uterine cervical cancer.
    Type: Grant
    Filed: June 7, 2010
    Date of Patent: September 16, 2014
    Assignee: Korea Center for Disease Control and Prevention
    Inventors: Jee Eun Rhee, Dae Ho Jang, Sung Soon Kim, Byeong Sun Choi
  • Patent number: 8051238
    Abstract: An on-chip bus includes a plurality of switch points including first and second switch points, a plurality of inter-switch links including at least one inter-switch link coupled between the first switch point and the second switch point and configured to communicate data between the first switch point and the second switch point, and a plurality of functional block cores including first and second functional block cores coupled directly to the first switch point and configured to communicate data through the first switch point. Data transmitted from the first functional block core to the second functional block cores may pass through the first switch point without traversing any of the plurality of inter-switch links. Methods for communicating data on an on-chip bus are also disclosed.
    Type: Grant
    Filed: October 6, 2005
    Date of Patent: November 1, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Chae-Eun Rhee
  • Publication number: 20110081644
    Abstract: Disclosed are a cell line that expresses protein of Seq. No. 1, and a method for screening an anticancer compound of uterine cervical cancer by using the same. The stable cell line that expresses oncoprotein E6 of a human papillomavirus type 16 variant strain is used to determine a difference in amounts of expression of tumor suppressor genes, such as p53, between E6 protein of the reference strain and E6 protein of a variant strain, thereby screening an anticancer compound of uterine cervical cancer, etc. Further, it is possible to develop an anticancer agent of uterine cervical cancer.
    Type: Application
    Filed: June 7, 2010
    Publication date: April 7, 2011
    Applicant: KOREA CENTER FOR DISEASE CONTROL AND PREVENTION
    Inventors: Jee Eun Rhee, Dae Ho Jang, Sung Soon Kim, Byeong Sun Choi
  • Patent number: 7626983
    Abstract: Provided are a method of creating an optimized tile-switch mapping architecture in an on-chip bus, and a computer readable recording medium for recording the method. The method of creating a tile-switch mapping architecture includes first, second and third calculating steps. The method of creating a tile-switch mapping architecture minimizes the hop distance between cores when the mapping relationship between cores and tiles is determined, to thereby minimize energy consumption and communication delay time in an on-chip bus. Furthermore, the method of creating a tile-switch mapping architecture presents a standard for comparing the optimization of other mapping architectures.
    Type: Grant
    Filed: October 12, 2005
    Date of Patent: December 1, 2009
    Assignee: Samsung Electronics Co.
    Inventor: Chae-Eun Rhee
  • Patent number: 7461361
    Abstract: There are provided a method of creating an optimized core-tile-switch mapping architecture in an on-chip bus and a computer-readable recording medium for recording the method. The core-tile-switch mapping architecture creating method includes: creating a core communication graph representing the connection relationship between arbitrary cores; creating a Network-on-chip (NOC) architecture including a plurality of switches, a plurality of tiles, and a plurality of links interconnecting the plurality of switches; and mapping the cores to the tiles using a predetermined optimized mapping method to thereby create the optimized core-tile-switch mapping architecture. The optimized mapping method includes first, second, and third calculating steps.
    Type: Grant
    Filed: October 11, 2005
    Date of Patent: December 2, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Chae-Eun Rhee
  • Publication number: 20070133761
    Abstract: Provided is a method and apparatus for providing a multimedia message service based on a Parlay X Web service to easily check the status of a multimedia message which is requested to be transmitted in a multimedia messaging application server. The apparatus activates a delivery status informing function for each application server upon receipt of a delivery status information activation request, receives a process result for the multimedia message requested by the application server from an MMS server, and transmits the delivery status information for the requested multimedia message to the application server, for which the status informing function is activated, through a status informing message in real-time.
    Type: Application
    Filed: December 5, 2006
    Publication date: June 14, 2007
    Inventors: Eun Rhee, Won Ryu
  • Publication number: 20060161875
    Abstract: There are provided a method of creating an optimized core-tile-switch mapping architecture in an on-chip bus and a computer-readable recording medium for recording the method. The core-tile-switch mapping architecture creating method includes: creating a core communication graph representing the connection relationship between arbitrary cores; creating a Network-on-chip (NOC) architecture including a plurality of switches, a plurality of tiles, and a plurality of links interconnecting the plurality of switches; and mapping the cores to the tiles using a predetermined optimized mapping method to thereby create the optimized core-tile-switch mapping architecture. The optimized mapping method includes first, second, and third calculating steps.
    Type: Application
    Filed: October 11, 2005
    Publication date: July 20, 2006
    Inventor: Chae-Eun Rhee
  • Publication number: 20060150138
    Abstract: Provided are a method of creating an optimized tile-switch mapping architecture in an on-chip bus, and a computer readable recording medium for recording the method. The method of creating a tile-switch mapping architecture includes first, second and third calculating steps. The method of creating a tile-switch mapping architecture minimizes the hop distance between cores when the mapping relationship between cores and tiles is determined, to thereby minimize energy consumption and communication delay time in an on-chip bus. Furthermore, the method of creating a tile-switch mapping architecture presents a standard for comparing the optimization of other mapping architectures.
    Type: Application
    Filed: October 12, 2005
    Publication date: July 6, 2006
    Applicant: Samsung Electronics Co., LTD.
    Inventor: Chae-Eun Rhee
  • Publication number: 20060129646
    Abstract: The present invention provides a method and system for providing a SIP based Instance Messaging (IM), and an IM proxy server therefor. An IM proxy server for performing a proxy function in a mobile communication network is configured to provide an IM service between a mobile terminal lacking an SIP function and an IM server. Further, the IM proxy server converts an IM message received from the mobile terminal into a corresponding SIP message mapped thereto, transmits the SIP message to the IM server through a call session control server, converts an SIP message received from the IM server through the call session control server into an IM message recognizable by the mobile terminal, and transmits the IM message to the mobile terminal, thus providing the SIP based IM service to the mobile terminal lacking an SIP function.
    Type: Application
    Filed: April 15, 2005
    Publication date: June 15, 2006
    Inventors: Eun Rhee, Soon Kim, Won Ryu
  • Publication number: 20060077914
    Abstract: An on-chip bus includes a plurality of switch points including first and second switch points, a plurality of inter-switch links including at least one inter-switch link coupled between the first switch point and the second switch point and configured to communicate data between the first switch point and the second switch point, and a plurality of functional block cores including first and second functional block cores coupled directly to the first switch point and configured to communicate data through the first switch point. Data transmitted from the first functional block core to the second functional block cores may pass through the first switch point without traversing any of the plurality of inter-switch links. Methods for communicating data on an on-chip bus are also disclosed.
    Type: Application
    Filed: October 6, 2005
    Publication date: April 13, 2006
    Inventor: Chae-Eun Rhee
  • Publication number: 20050174877
    Abstract: A bus arrangement is provided including a master device and a slave device. A master converts a read command into a write command and sends the write command through a bus network within the bus arrangement and a slave device converts the write command back to the read command and sends a response. The response is sent on a bus not included within the bus network, thereby reducing a response delay time between the transmission of the read command and the response to the read command.
    Type: Application
    Filed: January 19, 2005
    Publication date: August 11, 2005
    Inventors: Soon-Jae Cho, Woo-Young Jang, Chae-Eun Rhee
  • Publication number: 20050122942
    Abstract: The present invention relates to a method of balancing a load and method of setting up a call using the load balancing method in a General Packet Radio Service (GPRS) network, which prevents a load from concentrating on a specific Gateway GPRS Supporting Node (GGSN) in the GPRS network, thus reducing a probability of failure in session establishment due to increased traffic. In the load balancing method, when a Service GPRS Supporting Node (SGSN) connected to a mobile node establishes a session, it selects a GGSN having a smallest number of established sessions among a plurality of GGSNs corresponding to an Access Point Name (APN) included in an Activate PDP Context Request message received from the mobile node and requests the selected GGSN to establish a session, thus solving a problem in which a load concentrates on a specific GGSN.
    Type: Application
    Filed: April 1, 2004
    Publication date: June 9, 2005
    Inventors: Eun Rhee, Won Ryu