Abstract: An electronic pedal apparatus includes a pad that rectilinearly moves and rotates along a pad guide while being kept in line contact with the pad guide including a shape of an arc when a driver operates the pad, an acceleration signal or a braking signal for a vehicle is generated by operation of the single pad, and a movement direction of the pad at the time of generating the acceleration signal is different from a movement direction of the pad at the time of generating the braking signal.

Abstract: An embodiment electronic pedal apparatus includes a pedal housing and an accelerator pedal assembly and a brake pedal assembly coupled to the pedal housing and configured to move along different movement trajectories when the accelerator pedal assembly and the brake pedal assembly are operated. In an embodiment, the accelerator pedal assembly is compressed and moved upward when the accelerator pedal assembly is operated, and the brake pedal assembly is compressed and moved downward when the brake pedal assembly is operated.

Abstract: A reference voltage generation circuit is disclosed. The reference voltage generation circuit includes an operational amplifier configured to output a constant voltage in accordance with reference voltages input to first and second terminals of the operational amplifier, and a start-up circuit configured to initiate operation of the operational amplifier when the start-up circuit switches from an idle mode to an active mode, including a first transistor having a gate connected to an output of the operational amplifier, a source connected to a supply voltage, and a drain connected to a resistor, configured to supply a reference current to the resistor in accordance with the operational amplifier output, thereby generating the reference voltage.

Abstract: A bandgap reference voltage generating circuit, includes: at least two bipolar transistors; an operational amplifier; a first PMOS transistor; and a second PMOS transistor whose source is connected to the upper limit power supply voltage and which supplies the reference current to the bipolar transistors. Further, the bandgap reference voltage generating circuit includes a third PMOS transistor whose source is connected to the upper limit power supply voltage; a fourth PMOS transistor whose source is connected to the upper limit power supply voltage and gate is connected to a drain of the third PMOS transistor; a first NMOS transistor whose source is connected to the lower limit power supply voltage and drain is connected to a drain of the fourth PMOS transistor; and a second NMOS transistor whose drain is connected to the operational amplifier and gate is connected to the drain of the first NMOS transistor.

Abstract: A reference voltage generation circuit includes an operational amplifier for outputting a constant voltage in accordance with reference voltages respectively input to an inverting terminal of the operational amplifier and a non-inverting terminal of the operational amplifier, and a start-up circuit for waking up the operational amplifier when the start-up circuit is switched from an idle mode to an active mode. The start-up circuit includes a first-type transistor having a gate connected to an output of the operational amplifier, a source connected to a supply voltage, and a drain connected to resistors, to supply a constant reference current to the resistors in accordance with an output voltage from the operational amplifier, thereby generating a band-gap output voltage. The resistors are connected in parallel to a stage, from which the band-gap output voltage is output, in order to generate a band-gap output voltage of about 0.6V.

Abstract: A reference voltage generation circuit is disclosed. The reference voltage generation circuit includes an operational amplifier configured to output a constant voltage in accordance with reference voltages input to first and second terminals of the operational amplifier, and a start-up circuit configured to initiate operation of the operational amplifier when the start-up circuit switches from an idle mode to an active mode, including a first transistor having a gate connected to an output of the operational amplifier, a source connected to a supply voltage, and a drain connected to a resistor, configured to supply a reference current to the resistor in accordance with the operational amplifier output, thereby generating the reference voltage.

Abstract: There is provided a band gap reference voltage generation circuit capable of reducing wake up time during transition from an idle mode to a normal mode and further capable of removing the RF noise of an output voltage.

Abstract: A bandgap reference voltage generating circuit, includes: at least two bipolar transistors; an operational amplifier; a first PMOS transistor; and a second PMOS transistor whose source is connected to the upper limit power supply voltage and which supplies the reference current to the bipolar transistors. Further, the bandgap reference voltage generating circuit includes a third PMOS transistor whose source is connected to the upper limit power supply voltage; a fourth PMOS transistor whose source is connected to the upper limit power supply voltage and gate is connected to a drain of the third PMOS transistor; a first NMOS transistor whose source is connected to the lower limit power supply voltage and drain is connected to a drain of the fourth PMOS transistor; and a second NMOS transistor whose drain is connected to the operational amplifier and gate is connected to the drain of the first NMOS transistor.