Abstract: A semiconductor package may include a lower redistribution structure including redistribution patterns, a first semiconductor device on the lower redistribution structure, a core layer laterally apart from the first semiconductor device, the core layer on the lower redistribution structure and including a core insulating layer and core wires, an encapsulation material on the lower redistribution structure and at least partially covering side and upper surfaces of the core layer and of the first semiconductor device, a second semiconductor device on the encapsulation material, and a heat dissipation structure.

Abstract: A semiconductor package including a first semiconductor package that includes a redistribution layer, a substrate disposed on the redistribution layer and including a plurality of wiring layers, a first semiconductor chip disposed on the redistribution layer, and an encapsulant covering at least a portion of each of the substrate and the first semiconductor chip; and a second semiconductor package that is disposed on the first semiconductor package and includes a second semiconductor chip. The first semiconductor package includes a first side surface and a second side surface facing the first side surface. The plurality of wiring layers are disposed adjacent to the first side surface, the first semiconductor chip is disposed between the plurality of wiring layers and the second side surface, and a distance between the first semiconductor chip and the first side surface is greater than a distance between the first semiconductor chip and the second side surface.

Abstract: A semiconductor package includes: a first substrate having a rectangular cross-section on an X-Y plane, wherein the first substrate includes an upper surface and a lower surface opposite to the upper surface, and an aspect ratio of the rectangular cross-section is in a range of 1.5 to 2.2; a first chip on the upper surface of the first substrate; and a plurality of dummy balls on each of four corner areas of the lower surface of the first substrate.

Abstract: A method of manufacturing a semiconductor package is provided and includes: forming a lower redistribution structure, the lower redistribution structure including lower redistribution patterns having lower connection pads; forming an upper redistribution structure on a boundary surface of the lower redistribution structure, the upper redistribution structure including upper redistribution patterns having upper connection pads electrically connected to the lower connection pads; forming openings exposing at least a portion of each of the lower connection pads; disposing an interposer substrate, including the lower redistribution structure and the upper redistribution structure, on a base substrate, the lower connection pads of the interposer substrate electrically connected to wiring patterns of the base substrate through lower connection bumps disposed on the openings; and disposing at least one of semiconductor chips, including connection pads, on the interposer substrate, the connection pads electrically co

Abstract: A method of manufacturing a semiconductor package is provided and includes: forming a lower redistribution structure, the lower redistribution structure including lower redistribution patterns having lower connection pads; forming an upper redistribution structure on a boundary surface of the lower redistribution structure, the upper redistribution structure including upper redistribution patterns having upper connection pads electrically connected to the lower connection pads; forming openings exposing at least a portion of each of the lower connection pads; disposing an interposer substrate, including the lower redistribution structure and the upper redistribution structure, on a base substrate, the lower connection pads of the interposer substrate electrically connected to wiring patterns of the base substrate through lower connection bumps disposed on the openings; and disposing at least one of semiconductor chips, including connection pads, on the interposer substrate, the connection pads electrically co

Abstract: A method of manufacturing a semiconductor package is provided and includes: forming a lower redistribution structure, the lower redistribution structure including lower redistribution patterns having lower connection pads; forming an upper redistribution structure on a boundary surface of the lower redistribution structure, the upper redistribution structure including upper redistribution patterns having upper connection pads electrically connected to the lower connection pads; forming openings exposing at least a portion of each of the lower connection pads; disposing an interposer substrate, including the lower redistribution structure and the upper redistribution structure, on a base substrate, the lower connection pads of the interposer substrate electrically connected to wiring patterns of the base substrate through lower connection bumps disposed on the openings; and disposing at least one of semiconductor chips, including connection pads, on the interposer substrate, the connection pads electrically co

Abstract: A semiconductor package includes a base substrate including a wiring pattern, an interposer substrate including lower and upper redistribution patterns, a semiconductor structure, a heat dissipation structure, a plurality of external connection bumps disposed on a lower surface of the base substrate, a plurality of lower connection bumps disposed between the base substrate and the interposer substrate, and a plurality of upper connection bumps disposed between the interposer substrate and the semiconductor structure.

Abstract: A semiconductor package includes a base substrate including a wiring pattern, an interposer substrate including lower and upper redistribution patterns, a semiconductor structure, a heat dissipation structure, a plurality of external connection bumps disposed on a lower surface of the base substrate, a plurality of lower connection bumps disposed between the base substrate and the interposer substrate, and a plurality of upper connection bumps disposed between the interposer substrate and the semiconductor structure.

Abstract: A method for managing a temperature of a device includes determining a temperature of a circuit or a package including the circuit, and selectively operating a thermoelectric semiconductor based on the determined temperature to adjust the temperature of the circuit or the package.

Abstract: A surface temperature management method of mobile device is provided. The method includes sensing a temperature of an application processor in an operation mode of the mobile device; and controlling the application processor using the sensed temperature and a surface temperature management table to manage a surface temperature of a target part of the mobile device. The surface temperature management table includes information related to the temperature of the application processor corresponding to the surface temperature of the target part in the operation mode.

Abstract: A method for managing a temperature of a device includes determining a temperature of a circuit or a package including the circuit, and selectively operating a thermoelectric semiconductor based on the determined temperature to adjust the temperature of the circuit or the package.

Abstract: A surface temperature management method of mobile device is provided. The method includes sensing a temperature of an application processor in an operation mode of the mobile device; and controlling the application processor using the sensed temperature and a surface temperature management table to manage a surface temperature of a target part of the mobile device. The surface temperature management table includes information related to the temperature of the application processor corresponding to the surface temperature of the target part in the operation mode.

Abstract: A device includes a first board having a first area and a second area not overlapping the first area; and a thermoelectric semiconductor disposed between the first board and the second board at the first area of the first board configured to supply a voltage to the thermoelectric semiconductor; a package disposed at the second area of the first board.

Abstract: A surface temperature management method of mobile device is provided. The method includes sensing a temperature of an application processor in an operation mode of the mobile device; and controlling the application processor using the sensed temperature and a surface temperature management table to manage a surface temperature of a target part of the mobile device. The surface temperature management table includes information related to the temperature of the application processor corresponding to the surface temperature of the target part in the operation mode.

Abstract: A device includes a first board having a first area and a second area not overlapping the first area; and a thermoelectric semiconductor disposed between the first board and the second board at the first area of the first board configured to supply a voltage to the thermoelectric semiconductor; a package disposed at the second area of the first board.

Abstract: Provided is a semiconductor package including a lower package, an interposer on the lower package, and an upper package on the interposer. The lower package may include a lower package substrate, a lower semiconductor chip on the lower package substrate, and a lower heat-transfer layer on the lower semiconductor chip. The interposer may include an interposer substrate, first and second heat-transfer openings defined by recessed bottom and top surfaces, respectively, of the interposer substrate, an upper interposer heat-transfer pad disposed in the second heat-transfer opening, and an upper heat-transfer layer disposed on the upper interposer heat-transfer pad. The upper package may include an upper package substrate, an upper package heat-transfer pad, which may be disposed in a third heat-transfer opening defined by a recessed bottom surface of the upper package substrate, and an upper semiconductor chip disposed on the upper package substrate.

Abstract: Provided are thermoelectric cooling packages and thermal management methods thereof. The method may include measuring a temperature of the thermoelectric cooling package including a semiconductor chip and a thermoelectric cooler, comparing the temperature of the thermoelectric cooling package with a target temperature, operating the thermoelectric cooler when the temperature of the thermoelectric cooling package is higher than the target temperature, and stopping the operation of the thermoelectric cooler when the temperature of the thermoelectric cooling package becomes lower than the target temperature.

Abstract: Chip-on-film packages are provided. A chip-on-film package includes a film substrate having a first surface and a second surface opposite to each other, a semiconductor chip on the first surface, and a thermal deformation member adjacent to the second surface. The thermal deformation member has a construction that causes its shape to transform according to a temperature. Related devices and device assembles are also provided.

Abstract: Provided is a semiconductor package including a lower package, an interposer on the lower package, and an upper package on the interposer. The lower package may include a lower package substrate, a lower semiconductor chip on the lower package substrate, and a lower heat-transfer layer on the lower semiconductor chip. The interposer may include an interposer substrate, first and second heat-transfer openings defined by recessed bottom and top surfaces, respectively, of the interposer substrate, an upper interposer heat-transfer pad disposed in the second heat-transfer opening, and an upper heat-transfer layer disposed on the upper interposer heat-transfer pad. The upper package may include an upper package substrate, an upper package heat-transfer pad, which may be disposed in a third heat-transfer opening defined by a recessed bottom surface of the upper package substrate, and an upper semiconductor chip disposed on the upper package substrate.

Abstract: A method for controlling a temperature of an electronic device which includes a semiconductor chip is provided. The temperature control method includes measuring a temperature of a measurement point using the electronic device, comparing the temperature of the measurement point with a target temperature varying according to a period of time when the semiconductor chip operates using the electronic device, and decreasing a clock frequency of the semiconductor chip using the electronic device when the temperature of the measurement point is higher than the target temperature.