Patents by Inventor Eun-Seok Choi

Eun-Seok Choi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9489057
    Abstract: An input apparatus of a display apparatus, a display system, and a control method thereof, are provided herein, the input apparatus including: a communication unit which communicates with the display apparatus; a sensing unit which detects angular speed and acceleration from a motion of the input apparatus; a storage unit which stores position information on a position of the input apparatus; and a controller which calculates the motion information based on the detected angular speed and the position information and transmits the calculated motion information through the communication unit if the input apparatus moves, and updates the position information in the storage unit based on the detected acceleration if the input apparatus does not move.
    Type: Grant
    Filed: April 21, 2015
    Date of Patent: November 8, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Eun-seok Choi, Sang-on Choi, Mi-ra Yu
  • Publication number: 20160307553
    Abstract: An electronic apparatus includes a plurality of pads, each of the plurality of pads including a touch sensor and an acceleration sensor, a sound output interface configured to output sounds that are set to the respective pads, a display configured to display visual feedback, and a processor configured to, in response to the touch sensor in a pad among the plurality of pads detecting a touch of the pad, and the acceleration sensor in the pad detecting an intensity of the touch that is greater than or equal to a value, determine that a beat is performed on the pad, control the sound output interface to output a sound that is set to the pad on which the beat is determined to be performed, with a magnitude corresponding to an intensity of the beat, and control the display to display the visual feedback corresponding to the beat determined to be performed.
    Type: Application
    Filed: April 15, 2016
    Publication date: October 20, 2016
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Mi-ra YU, Eun-seok CHOI, Yong-wan CHOI, Kun-sok KANG, Sang-on CHOI
  • Patent number: 9459707
    Abstract: A display apparatus and a method of controlling the display apparatus include displaying a plurality of display items on a display screen; acquiring a coordinate value of a position on the display screen pointed to by an input device; positioning a virtual pointer on the display screen in an area of first one of the plurality of display items that is proximate to the acquired coordinate value and highlighting the first display item on the display screen; and in response to the input device pointing to a new position, moving the virtual pointer according to a new coordinate value of the new position pointed to by the input device and highlighting a second one of the plurality of display items that is proximate to the new coordinate value on the display screen.
    Type: Grant
    Filed: July 22, 2014
    Date of Patent: October 4, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ho-june Yoo, Jong-bo Moon, Eun-seok Choi, Sang-on Choi
  • Patent number: 9452939
    Abstract: The present invention features a high-capacity anode material for rapidly chargeable and dischargeable lithium secondary batteries, which is composed of Li4Ti5O12 nanoparticles. The Li4Ti5O12 nanoparticles of the present invention exhibit excellent crystallinity and high rate capability compared to those synthesized using a conventional polyol process or solid reaction process by converting Li4Ti5O12, which is a zero-strain insert material spotlighted as an anode active material for lithium secondary batteries, into Li4Ti5O12, having a high crystalline nanostructure using a solvothermal synthesis process without performing additional heat treatment. The present invention also features methods of, and a method of preparing the high-capacity anode materials described herein.
    Type: Grant
    Filed: May 11, 2010
    Date of Patent: September 27, 2016
    Assignees: Hyundai Motor Company, Industry Foundation of Chonnam National University
    Inventors: Jae Kook Kim, Chul Hong Woo, Eun Seok Choi, Jin Sub Lim, Dong Han Kim, Seung Ho Ahn
  • Publication number: 20160268625
    Abstract: Disclosed herein are an electrode stack including at least one positive electrode, at least one negative electrode, and at least one separator, wherein the separator is laminated to one surface or opposite surfaces of at least one of the electrodes, the positive electrode, the negative electrode, and the separator are stacked such that the separator is disposed between the positive electrode and the negative electrode, and a stacked surface of each of the positive electrode, the negative electrode, and the separator includes a curved surface, and a battery cell including the same.
    Type: Application
    Filed: May 8, 2014
    Publication date: September 15, 2016
    Applicant: LG Chem, Ltd.
    Inventors: Eun Seok Choi, Shin Hyo Cho, Byung O Park, Jae Bin Chung, Dong-Myung Kim
  • Publication number: 20160236236
    Abstract: A non-phosphate coated metal material for plastic working includes a metal material, a coating layer formed on a surface of the metal material, and a lubrication layer on the coating layer. The coating layer includes calcium tetraborate. A method for manufacturing a non-phosphate coated metal material includes a pre-treatment process to remove foreign matters or scale from a surface of a metal material, a coating treatment process to form a coating layer on the surface of the metal material by dipping the metal material, which is subject to the pre-treatment process, into a coating agent, and a lubrication treatment process to form a lubrication layer on the coating layer through the contact between the coated metal material and a lubricating agent. The coating agent includes a non-phosphate treatment solution including at least one borate selected from sodium tetraborate and a hydrate thereof, sodium nitrite, calcium hydroxide, and water.
    Type: Application
    Filed: July 28, 2015
    Publication date: August 18, 2016
    Applicant: HAN YOUNG STEEL WIRE CO., LTD.
    Inventor: Eun Seok CHOI
  • Publication number: 20160204119
    Abstract: A semiconductor device may include: a plurality of source-side half channels positioned in a first region and arranged in first to 2Nth rows, wherein N is an integer equal to or greater than 2; a plurality of first drain-side half channels positioned in a second region at one side of the first region and arranged in first to Nth rows; a plurality of second drain-side half channels positioned in a third region at the other side of the first region and arranged in first to Nth rows; a plurality of first pipe channels suitable for connecting the first to Nth rows of source-side half channels to the first to Nth rows of first drain-side half channels, respectively; and a plurality of second pipe channels suitable for connecting the (N+1)th to 2Nth rows of source-side half channels to the first to Nth rows of second drain-side half channels, respectively.
    Type: Application
    Filed: June 15, 2015
    Publication date: July 14, 2016
    Inventor: Eun-Seok CHOI
  • Publication number: 20160181275
    Abstract: A nonvolatile memory device includes a substrate comprising a first word line formation area, a second word line formation area, and a support area interposed between the first and second word line formation areas; a first stacked structure disposed over the substrate of each of the first and second word line formation areas and having a plurality of interlayer dielectric layers and a plurality of conductive layers that are alternately stacked therein; a second stacked structure disposed over the substrate of the support area and having the plurality of interlayer dielectric layers and a plurality of spaces that are alternately stacked therein; a channel layer disposed in the first stacked structure; and a memory layer interposed between the channel layer and each of the plurality of conductive layers.
    Type: Application
    Filed: March 1, 2016
    Publication date: June 23, 2016
    Inventors: Eun-Seok CHOI, Sa-Yong SHIM, In-Hey LEE, Sung-Wook JUNG, Jung-Seok OH
  • Patent number: 9372557
    Abstract: A display apparatus, an input apparatus, and a method for compensating coordinates using the same. A method for compensating coordinates using a display apparatus includes receiving movement information from an input apparatus, calculating a coordinate value based on the movement information, and displaying a cursor on the calculated coordinate value. When a button selection command is received from the input apparatus, replacing a coordinate value calculated after receiving the button selection command with a coordinate value of a stable position calculated before receiving the button selection command, and displaying the cursor on the replaced coordinate value, and manipulating an item on which the cursor is located according to the button selection command. Accordingly, the user may locate a cursor on the location that the user wants and execute a display item.
    Type: Grant
    Filed: January 2, 2014
    Date of Patent: June 21, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jong-bo Moon, Eun-seok Choi, Byung-seok Soh, Sang-on Choi
  • Patent number: 9361949
    Abstract: A semiconductor memory device includes a plurality of first stacked structures including a plurality of first material layers at ends of which first contact regions are defined, a plurality of second stacked structures including a plurality of second material layers, wherein second contact regions are defined at ends of the second material layers and arranged between the first stacked structures so that the first contact regions and the second contact regions overlap each other, and a plurality of lines coupled in common to the first contact regions and the second contact regions.
    Type: Grant
    Filed: December 24, 2013
    Date of Patent: June 7, 2016
    Assignee: SK hynix Inc.
    Inventor: Eun Seok Choi
  • Patent number: 9362299
    Abstract: A non-volatile memory device in accordance with one embodiment of the present invention includes a substrate including a P-type impurity-doped region, a channel structure comprising a plurality of interlayer insulating layers that are alternately stacked with a plurality of channel layers on the substrate, a P-type semiconductor pattern that contacts sidewalls of the plurality of channel layers, wherein a lower end of the P-type semiconductor pattern contacts the P-type impurity-doped region, and source lines that are disposed at both sides of the P-type semiconductor pattern and contact the sidewalls of the plurality of channel layers.
    Type: Grant
    Filed: May 4, 2015
    Date of Patent: June 7, 2016
    Assignee: SK Hynix Inc.
    Inventors: Eun-Seok Choi, Hyun-Seung Yoo
  • Publication number: 20160154478
    Abstract: An interface apparatus includes a communicator configured to receive identification information and a sensing value on a motion of at least one pointing apparatus from the at least one pointing apparatus and an interface controller configured to control the communicator to calculate display position information of a pointer corresponding to the at least one pointing apparatus based on the received sensing value and transmit the identification information and the calculated display position information on the pointer to an image processor.
    Type: Application
    Filed: November 24, 2015
    Publication date: June 2, 2016
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Eun-seok CHOI, Ho-june YOO, Yong-wan CHOI, Sang-on CHOI
  • Publication number: 20160133987
    Abstract: Disclosed herein are an electrode stack including at least one positive electrode, at least one negative electrode, and at least one separator, wherein the positive electrode, the negative electrode, and the separator are stacked such that the separator is disposed between the positive electrode and the negative electrode, one end of each of the positive electrode and the negative electrode does not intersect the other end of each of the positive electrode and the negative electrode, a stacked surface of each of the positive electrode, the negative electrode, and the separator includes a curved surface, and the negative electrode has an arc length equal to or greater than that of the positive electrode while the separator has an arc length greater than that of the positive electrode in a state in which the positive electrode, the negative electrode, and the separator are curved, and a battery pack including the same.
    Type: Application
    Filed: May 8, 2014
    Publication date: May 12, 2016
    Applicant: LG Chem, Ltd.
    Inventors: Eun Seok Choi, Shin Hyo Cho, Jae Bin Chung, Dong-Myung Kim
  • Patent number: 9306040
    Abstract: A nonvolatile memory device includes a substrate comprising a first word line formation area, a second word line formation area, and a support area interposed between the first and second word line formation areas; a first stacked structure disposed over the substrate of each of the first and second word line formation areas and having a plurality of interlayer dielectric layers and a plurality of conductive layers that are alternately stacked therein; a second stacked structure disposed over the substrate of the support area and having the plurality of interlayer dielectric layers and a plurality of spaces that are alternately stacked therein; a channel layer disposed in the first stacked structure; and a memory layer interposed between the channel layer and each of the plurality of conductive layers.
    Type: Grant
    Filed: July 17, 2013
    Date of Patent: April 5, 2016
    Assignee: SK Hynix Inc.
    Inventors: Eun-Seok Choi, Sa-Yong Shim, In-Hey Lee, Sung-Wook Jung, Jung-Seok Oh
  • Patent number: 9287283
    Abstract: A method for fabricating a non-volatile memory device includes alternately stacking a plurality of interlayer dielectric layers and a plurality of conductive layers over a substrate, etching the interlayer dielectric layers and the conductive layers to form a trench which exposes a surface of the substrate forming a first material layer over a resulting structure in which the trench is formed, forming a second material layer over the first material layer, removing portions of the second material layer and the first material layer formed on a bottom of the trench to expose the surface of the substrate, removing the second material layer, and burying a channel layer within the trench in which the second material layer is removed.
    Type: Grant
    Filed: May 2, 2012
    Date of Patent: March 15, 2016
    Assignee: Hynix Semiconductor Inc.
    Inventors: Se-Yun Lim, Eun-Seok Choi, Young-Wook Lee, Won-Joon Choi, Ki-Hong Lee, Sang-Bum Lee
  • Patent number: D763837
    Type: Grant
    Filed: June 6, 2014
    Date of Patent: August 16, 2016
    Assignee: LG Electronics Inc.
    Inventors: Sha Rim Choe, Kyu Bong Choi, Eun Seok Choi, Joon Hyung Kim
  • Patent number: D764428
    Type: Grant
    Filed: June 6, 2014
    Date of Patent: August 23, 2016
    Assignee: LG Electronics Inc.
    Inventors: Sha Rim Choe, Kyu Bong Choi, Eun Seok Choi, Joon Hyung Kim
  • Patent number: D764429
    Type: Grant
    Filed: June 6, 2014
    Date of Patent: August 23, 2016
    Assignee: LG Electronics Inc.
    Inventors: Sha Rim Choe, Kyu Bong Choi, Eun Seok Choi, Joon Hyung Kim
  • Patent number: D765067
    Type: Grant
    Filed: June 6, 2014
    Date of Patent: August 30, 2016
    Assignee: LG Electronics Inc.
    Inventors: Sha Rim Choe, Kyu Bong Choi, Eun Seok Choi, Joon Hyung Kim
  • Patent number: D772812
    Type: Grant
    Filed: October 9, 2014
    Date of Patent: November 29, 2016
    Assignee: LG ELECTRONICS INC.
    Inventors: Sha Rim Choe, Kyu Bong Choi, Eun Seok Choi, Joon Hyung Kim