Abstract: A NAND-type non-volatile memory device includes a substrate and a device isolation layer disposed on the substrate to define an active region. First and second selection transistors are disposed in the active region, such that each of the first and second selection transistors has a recessed channel. A plurality of memory transistors is disposed in the active region between the first selection transistor and the second selection transistor.

Abstract: A method of forming a non-volatile memory device may include forming a fin protruding from a substrate, forming a tunnel insulating layer on portions of the fin, and forming a floating gate on the tunnel insulting layer so that the tunnel insulating layer is between the floating gate and the fin. A dielectric layer may be formed on the floating gate so that the floating gate is between the dielectric layer and the fin, and a control gate electrode may be formed on the dielectric layer so that the dielectric layer is between the control gate and the fin. Related devices are also discussed.

Abstract: Semiconductor devices including a gate electrode crossing over a semiconductor fin on a semiconductor substrate are provided. A gate insulating layer is provided between the gate electrode and the semiconductor fin. A channel region having a three-dimensional structure defined at the semiconductor fin under the gate electrode is also provided. Doped region is provided in the semiconductor fin at either side of the gate electrode and an interlayer insulating layer is provided on a surface of the semiconductor substrate. A connector region is coupled to the doped region and provided in an opening, which penetrates the interlayer insulating layer. A recess region is provided in the doped region and is coupled to the connector region. The connector region contacts an inner surface of the recess region. Related methods of fabricating semiconductor devices are also provided herein.

Abstract: A method of forming a non-volatile memory device may include forming a fin protruding from a substrate, forming a tunnel insulating layer on portions of the fin, and forming a floating gate on the tunnel insulting layer so that the tunnel insulating layer is between the floating gate and the fin. A dielectric layer may be formed on the floating gate so that the floating gate is between the dielectric layer and the fin, and a control gate electrode may be formed on the dielectric layer so that the dielectric layer is between the control gate and the fin. Related devices are also discussed.

Abstract: Provided are methods for fabricating semiconductor devices incorporating a fin-FET structure that provides body-bias control, exhibits some characteristic advantages associated with SOI structures, provides increased operating current and/or reduced contact resistance. The methods for fabricating semiconductor devices include forming insulating spacers on the sidewalls of a protruding portion of a first insulation film; forming a second trench by removing exposed regions of the semiconductor substrate using the insulating spacers as an etch mask, and thus forming fins in contact with and supported by the first insulation film. After forming the fins, a third insulation film is formed to fill the second trench and support the fins. A portion of the first insulation film is then removed to open a space between the fins in which additional structures including gate dielectrics, gate electrodes and additional contact, insulating and storage node structures may be formed.

Abstract: Semiconductor devices including a gate electrode crossing over a semiconductor fin on a semiconductor substrate are provided. A gate insulating layer is provided between the gate electrode and the semiconductor fin. A channel region having a three-dimensional structure defined at the semiconductor fin under the gate electrode is also provided. Doped region is provided in the semiconductor fin at either side of the gate electrode and an interlayer insulating layer is provided on a surface of the semiconductor substrate. A connector region is coupled to the doped region and provided in an opening, which penetrates the interlayer insulating layer. A recess region is provided in the doped region and is coupled to the connector region. The connector region contacts an inner surface of the recess region. Related methods of fabricating semiconductor devices are also provided herein.

Abstract: A fuel cell system possessing a mixing tank for recovering an unreacted fuel, the mixing tank being capable of effectively condensing a stack emission product without increasing its volume. The mixing tank includes a fuel supply port for supplying a concentrated fuel; a fluid inlet port for supplying a fluid discharged from an external fuel cell stack; a chamber for mixing the concentrated fuel with the fluid discharged from the fuel cell stack; a stack supply port for supplying a mixed fuel in the chamber to the fuel cell stack; and a chamber cooling member for cooling the chamber.

Abstract: Provided are methods for fabricating semiconductor devices incorporating a fin-FET structure that provides body-bias control, exhibits some characteristic advantages associated with SOI structures, provides increased operating current and/or reduced contact resistance. The methods for fabricating semiconductor devices include forming insulating spacers on the sidewalls of a protruding portion of a first insulation film; forming a second trench by removing exposed regions of the semiconductor substrate using the insulating spacers as an etch mask, and thus forming fins in contact with and supported by the first insulation film. After forming the fins, a third insulation film is formed to fill the second trench and support the fins. A portion of the first insulation film is then removed to open a space between the fins in which additional structures including gate dielectrics, gate electrodes and additional contact, insulating and storage node structures may be formed.

Abstract: A module-type fuel cell system including a power module includes a generator installed inside and a power housing having a plurality of connection holes formed sideward, wherein the generator generates electricity through an oxidation-reduction reaction of an oxidizing agent with a hydrogen-containing fuel; a fuel supply module including a fuel supply unit installed inside and a power housing having a plurality of connection holes formed sideward, wherein the fuel supply unit supplies a hydrogen-containing fuel to the generator; an oxidizing agent supply module including an oxidizing agent supply unit installed inside and an oxidizing agent supply housing having connection holes formed sideward, wherein the oxidizing agent supply unit supplies an oxidizing agent to the generator; and a recovery module including a storage space formed therein and a recovery housing having a plurality of connection holes formed sideward, wherein the storage space recovers an unreacted fuel generated in the generator, wherein th

Abstract: A non-volatile memory cell includes a semiconductor substrate having a fin-shaped active region extending therefrom. A tunnel dielectric layer is provided, which extends on opposing sidewalls and an upper surface of the fin-shaped active region. A floating gate electrode is provided on the tunnel dielectric layer. This floating gate electrode has at least a partial groove therein. An inter-gate dielectric layer is also provided. This inter-gate dielectric layer extends on the floating gate electrode and into the at least a partial groove. A control gate electrode is provided, which extends on the inter-gate dielectric layer and into the at least a partial groove.

Abstract: A non-volatile memory device may include a substrate having a field region and an active region including a rounded upper edge portion and a flat upper central portion, an effective tunnel oxide layer on the flat upper central portion of the active region, a split floating gate electrode on the effective tunnel oxide layer, the floating gate electrode having a width greater than a width of the effective tunnel oxide layer, a dielectric layer pattern on the floating gate electrode, the dielectric layer pattern including metal oxide, and a control gate electrode on the dielectric layer pattern.

Abstract: Unit cells of silicon-oxide-nitride-oxide-silicon (SONOS) memory devices are provided. The unit cells include an integrated circuit substrate and a SONOS memory cell on the integrated circuit substrate. The SONOS memory cell includes a source region, a drain region and a gate contact. The integrated circuit substrate defines a trench between the source and drain regions and the gate contact is provided in the trench. A floor of the trench extends further into the integrated circuit substrate than lower surfaces of the source and drain regions. Related methods of fabricating SONOS memory cells are also provided.

Abstract: Disclosed is a fuel feeder housing having a mixing tank and a carbon dioxide remover supporting operation of a fuel cell are formed as a single body. A peripheral module having the fuel feeder housing and a pump are modularized, thereby consulting the compactness and the light weight and enhancing the efficiency of the fuel cell. The fuel feeder housing is coupled to a fuel cartridge storing hydrogen-containing fuel and to a fuel cell that generates electricity through an electrochemical reaction between the fuel and an oxidant. The fuel feeder includes a base member in which a chamber for recycling unreacted fuel discharged from the fuel cell and first and second connecting portions for flowing fluid in and out the chamber therethrough are internally formed as a single body and a gas-liquid separator installed in an opening of the chamber and discharging gas from the chamber.

Abstract: There is provided a fuel cell system comprising a reformer for generating hydrogen from hydrogen-containing fuel and at least one electricity generator for generating electric energy through an electrochemical reaction of hydrogen and oxygen. The reformer includes a plurality of reaction sections for generating hydrogen from hydrogen-containing fuel; a plurality of heating sections which supply thermal energy to the plurality of heating sections and which have a catalyst; and a main body receiving the plurality of reaction sections and the plurality of heating sections. The respective heating sections generate different amounts of thermal energy necessary for the reactions of the respective reaction sections.

Abstract: A gate structure in a semiconductor device includes a tunnel insulation layer disposed on a substrate, a first charge trapping layer disposed on the tunnel insulation layer, a second charge trapping layer disposed on the first charge trapping layer, a dielectric layer disposed to cover the second charge trapping layer, and a conductive layer pattern disposed on the dielectric layer. The first charge trapping layer includes charge trapping sites for storing charges therein. The second charge trapping layer includes nanocrystals. The semiconductor device including the gate structure may have a sufficiently wide programming/erasing window and an improved data retention capability.

Abstract: A nonvolatile memory device includes a semiconductor pin including a first semiconductor pattern, a second semiconductor pattern on the first semiconductor pattern, and a third semiconductor pattern, disposed between the first semiconductor pattern and the second semiconductor pattern, connecting the first semiconductor pattern and the second semiconductor pattern, a charge storage layer on the second semiconductor pattern with a tunneling insulation layer interposed therebetween, and a gate electrode on the charge storage layer with a blocking insulation layer interposed therebetween, wherein a width of the second semiconductor pattern is greater than a width of the third semiconductor pattern.

Abstract: An air and liquid separator used in a fuel cell, the air and liquid separator including: a fuel guidance pipe having one or more opening portions on a surface thereof; and an air and liquid separating film provided on the opening portions of the fuel guidance pipe and transmitting only gas. Accordingly, an air and liquid separator according to aspects of the present invention remove gas included in non-reactive fuel by using an air and liquid separating film, without any separate power sources, and supplies the non-reactive fuel to a fuel cell, enabling a more compact and high efficient fuel cell system.

Abstract: A semiconductor device includes a semiconductor substrate having a first conductivity type and having an upper portion, a pair of bit lines extending in a first direction and doped with an impurity of a second conductivity type opposite to the first conductivity type and spaced from one another in the upper portion of the semiconductor substrate, a first line formed between the pair of bit lines having a plurality of alternating recessed device isolation regions and channel regions, with each of the channel regions contacting each bit line of the at least one pair of bit lines, and word lines formed at right angles to the first lines and covering the channel regions.

Abstract: Semiconductor devices including a gate electrode crossing over a semiconductor fin on a semiconductor substrate are provided. A gate insulating layer is provided between the gate electrode and the semiconductor fin. A channel region having a three-dimensional structure defined at the semiconductor fin under the gate electrode is also provided. Doped region is provided in the semiconductor fin at either side of the gate electrode and an interlayer insulating layer is provided on a surface of the semiconductor substrate. A connector region is coupled to the doped region and provided in an opening, which penetrates the interlayer insulating layer. A recess region is provided in the doped region and is coupled to the connector region. The connector region contacts an inner surface of the recess region. Related methods of fabricating semiconductor devices are also provided herein.

Abstract: An isolation method of defining active fins, a method of fabricating a semiconductor device using the same, and a semiconductor device fabricated thereby are provided. The method of fabricating a semiconductor device includes: preparing a semiconductor substrate; and forming a plurality of active fins having major and minor axes and two-dimensionally arrayed on the semiconductor substrate in directions of the major and minor axes. A liner pattern is formed on lower sidewalls of the active fins. An isolation layer is formed on the semiconductor substrate having the liner pattern, and the isolation layer exposes top surfaces of the active fins and a part of the active fins' sidewalls substantially parallel to the major axis. Parallel gate lines are formed to cover the top surfaces and the exposed sidewalls of the active fins, cross over the active fins, and run on the isolation layer.