Abstract: An eco-friendly biodegradable polyester resin composition includes a polyester resin that includes a diol, an aromatic dicarboxylic acid and an aliphatic dicarboxylic acid, wherein a biodegradability per aliphatic carboxylic acid is 1.7 or more, the biodegradability per aliphatic carboxylic acid being a value obtained by dividing a biodegradability after 9 weeks by a ratio of the aliphatic dicarboxylic acid to the total dicarboxylic acid, and the biodegradability after 9 weeks being 85% or more.

Abstract: An eco-friendly biodegradable polyester resin composition, including: a polyester resin including a diol, an aromatic dicarboxylic acid and an aliphatic dicarboxylic acid, wherein a soft segment ratio of the polyester resin is 0.21 to 0.29, and wherein the soft segment ratio is a ratio of a diol, bonded between the aliphatic dicarboxylic acid and the aliphatic dicarboxylic acid, among the diols.

Abstract: An eco-friendly biodegradable molded article which includes a polyester resin including a diol, an aromatic dicarboxylic acid and an aliphatic dicarboxylic acid and has a wet hardness reduction rate of 12% to 25%.

Abstract: Disclosed is an eco-friendly biodegradable polyester resin composition, including: a polyester resin including a diol, an aromatic dicarboxylic acid and an aliphatic dicarboxylic acid, wherein an alternating ratio of the polyester resin is 0.3 to 0.7, wherein the alternating ratio is a ratio of a diol, bonded between the aromatic dicarboxylic acid and the aliphatic dicarboxylic acid, among the diol.

Abstract: An eco-friendly biodegradable polyester resin composition includes a polyester resin that includes a diol, an aromatic dicarboxylic acid and an aliphatic dicarboxylic acid, wherein the first weight swelling rate of the biodegradable polyester resin composition is 4% to 20%.

Abstract: The present disclosure is a composition for a semiconductor process applied to a polishing process of a semiconductor wafer and, more specifically, to a semiconductor process involving a polishing process of a semiconductor wafer, wherein the composition includes abrasive particles, and the zeta potential of the abrasive particles is ?50 mV to ?10 mV at a pH of 6, and the zeta potential change rate represented by Equation 1 below is 6 mV to 30 mV: [Equation 1] Zeta potential change rate (mV/pH)=|(Z6?Z5)/(p6?p5)| where p6 denotes pH 6, p5 denotes pH 5, Z6 denotes a zeta potential at the pH 6, and Z5 denotes a zeta potential at the pH 5.

Abstract: The present disclosure is to provide a polishing pad which is capable of providing physical properties corresponding to various polishing purposes for various polishing objects through the subdivided structural design in a thickness direction, and of securing environmental friendliness by applying a recycled or recyclable material to at least some components, in relation to disposal after use, unlike the conventional polishing pad. Specifically, the polishing pad includes a polishing layer, wherein the polishing layer includes a polishing variable layer having a polishing surface; and a polishing constant layer disposed on a rear surface side of the polishing variable layer opposite to the polishing surface, and wherein the polishing constant layer includes a cured product of a composition having thermosetting polyurethane particles and a binder.

Abstract: The present disclosure is to provide a polishing pad which is capable of providing physical properties corresponding to various polishing purposes for various polishing objects through the subdivided structural design in a thickness direction, and of securing environmental friendliness by applying a recycled or recyclable material to at least some components, in relation to disposal after use, unlike the conventional polishing pad. Specifically, it includes a polishing layer, wherein the polishing layer includes a polishing variable layer having a polishing surface; and a polishing constant layer disposed on a rear surface side of the polishing variable layer opposite to the polishing surface.

Abstract: Provided are a polishing device including: a surface plate; a polishing pad mounted on the surface plate; a carrier for accommodating a polishing object; and a slurry supply unit including at least one nozzle, wherein the carrier performs a vibrating motion in a trajectory from the center of the surface plate to the end of the surface plate, and the slurry supply unit performs a vibrating motion at the same trajectory and speed as those of the vibrating motion of the carrier, as a polishing device which includes a slurry supply unit enabling subdivided driving in the supply of a polishing slurry, and in which the driving of the slurry supply unit has an advantage enabling optimized driving in an organic relationship between rotation and/or vibrating motion of the carrier and the surface plate and vertical pressurization conditions, etc. for the polishing surface of the carrier.

Abstract: Provided is a polishing composition for a semiconductor process comprising abrasive particles, the abrasive particles containing an amine-based polishing rate improver, and comprising the amine-based polishing rate improver. Provided is a polishing composition for a semiconductor process further comprising an amine-based surface modifier around the surface of the abrasive particles, wherein the sum of the content of an amine group contained in the amine-based polishing rate improver and the content of an amine group contained in the amine-based surface modifier is 0.0185% by weight or more based on the total composition weight. The polishing composition for a semiconductor process may implement the polishing rate and defect prevention performance within a target range in polishing the boron-doped polysilicon layer.

Abstract: In the composition according to the embodiment, the content of an unreacted diisocyanate monomer in a urethane-based prepolymer may be controlled to control the physical properties thereof such as gelation time. Thus, since the micropore characteristics, polishing rate, and pad cut rate of a polishing pad obtained by curing the composition according to the embodiment may be controlled, it is possible to efficiently manufacture high-quality semiconductor devices using the polishing pad.

Abstract: The present invention relates to a polishing pad for use in a chemical mechanical planarization (CMP) process of semiconductors, to a process for preparing the same, and to a process for preparing a semiconductor device using the same. The polishing pad according to an embodiment can achieve low hardness by comprising a polishing layer formed using a curing agent of specific components. It is possible to enhance the mechanical properties of the polishing pad, as well as to improve the surface defects appearing on the surface of a semiconductor substrate, by controlling the surface roughness reduction rate and the recovery elasticity index of the polishing pad to specific ranges. It is also possible to further enhance the polishing rate.

Abstract: Embodiments relate to a polishing pad for use in a chemical mechanical planarization (CMP) process of semiconductor devices. The polishing pad may secure excellent polishing rate and within-wafer non-uniformity by controlling the physical properties such as initial load resistivity and compressive elasticity of the cushion layer and/or the laminate as defined by Equations 1 and 2: L ? R L ? ( % ) = T ? 1 ? L - T ? 2 ? L T ? 1 ? L - T ? 3 ? L × 100 [ Equation ? ? 1 ] C ? E L ? ( % ) = T ? 4 ? L - T ? 3 ? L T ? 2 ? L - T ? 3 ? L × 1 ? 00.

Abstract: The present disclosure relates to a polishing pad, a method for manufacturing the polishing pad, and a method for manufacturing a semiconductor device using the polishing pad, and the present disclosure can prevent an error in detecting the end point due to the window in the polishing pad by minimizing the effect on transmittance according to the surface roughness of the window in the polishing pad in the polishing process, and allows the fluidity and loading rate of the polishing slurry in the polishing process to be implemented at similar levels by maintaining the surface roughness difference between the polishing layer and the window in the polishing pad within the predetermined range, thereby enabling the problem of deterioration of polishing performance due to the surface difference between the polishing layer and the window to be prevented. Further, a method for manufacturing a semiconductor device to which a polishing pad is applied may be provided.

Abstract: A polishing pad includes a polishing layer, wherein the polishing layer includes zinc (Zn), and a concentration of the zinc (Zn) is 0.5 ppm to 40 ppm parts by weight based on the total weight of the polishing layer. In an exemplary embodiment, a polishing pad is provided wherein a concentration of the zinc (Zn) is 0.5 ppm to 40 ppm parts by weight based on the total weight of the polishing layer, a concentration of the iron (Fe) is 1 ppm to 50 ppm parts by weight based on the total weight of the polishing layer, and a concentration of the aluminum (Al) is 2 ppm to 50 ppm parts by weight based on the total weight of the polishing layer.

Abstract: The present invention relates to a polishing pad, a method for producing the same, and a method of fabricating a semiconductor device using the same. According to the present invention, it is possible to prevent defects from occurring due to an inorganic component contained in a polishing layer during a polishing process, by limiting the content range of the inorganic component contained in the polishing layer. In addition, an unexpanded solid foaming agent is contained in a polishing composition for producing a polishing layer and is expanded during a curing process to form a plurality of uniform pores in the polishing layer, and the content range of the inorganic component contained in the polishing layer, thereby preventing defects from occurring during the polishing process.

Abstract: The polishing pad according to an embodiment adjusts the content of elements present in the polishing layer, thereby controlling the bonding strength between the polishing pad and the polishing particles and enhancing the bonding strength between the polishing particles and the semiconductor substrate (or wafer), resulting in an increase in the polishing rate. It is possible to enhance not only the mechanical properties of the polishing pad such as hardness, tensile strength, elongation, and modulus, but also the polishing rate for both a tungsten layer or an oxide layer. Accordingly, it is possible to efficiently fabricate a semiconductor device of excellent quality using the polishing pad.

Abstract: The present disclosure relates to a polishing pad, a method for manufacturing the polishing pad, and a method for manufacturing a semiconductor device using the polishing pad. The polishing pad increases the area in direct contact with the semiconductor substrate during the polishing process and can prevent defects occurring on the surface of the semiconductor substrate by forming a plurality of uniform pores in the polishing layer, thereby adjusting the surface roughness characteristics of the polishing surface of the polishing layer. Further, the present disclosure may provide a method for manufacturing a semiconductor device to which the polishing pad is applied.

Abstract: Provided is a polishing pad including a polishing layer, wherein the nuclear magnetic resonance (NMR) 13C spectrum of a processed composition prepared by adding 1 g of the polishing layer to a 0.3 M aqueous solution of potassium hydroxide (KOH) and allowing the mixture to react in a closed container at a temperature of 150° C. for 48 hours includes a first peak appearing at 15 ppm to 18 ppm, a second peak appearing at 9 ppm to 11 ppm, and a third peak appearing at 138 ppm to 143 ppm, and the area ratio of the third peak to the second peak is about 5:1 to about 10:1. The polishing pad may exhibit physical properties corresponding to the above-described peak characteristics, thereby achieving a removal rate and defect prevention performance within desired ranges in polishing of a polishing target.

Abstract: The present disclosure relates to a polishing pad, a method of manufacturing the polishing pad, and a method of manufacturing a semiconductor device using the same. In the polishing pad, an unexpanded solid-phase blowing agent is included in a polishing composition when a polishing layer is manufactured, and the unexpanded solid-phase blowing agent is expanded during a curing process to form a plurality of uniform pores in the polishing layer, such that defects occurring on a surface of the semiconductor substrate may be prevented. In addition, the present disclosure may provide a method of manufacturing a semiconductor device to which the polishing pad is applied.