Abstract: A Semiconductor device and method for fabricating the same are provided. The method includes forming a trench in a substrate, forming a lower gate metal using a first gas, the lower gate metal burying at least a portion of the trench, forming a barrier metal on the lower gate metal, on the barrier metal, forming an upper gate metal using a second gas different from the first gas and forming a capping film on the gate metal, the capping film filling the trench.

Abstract: A Semiconductor device and method for fabricating the same are provided. The method includes forming a trench in a substrate, forming a lower gate metal using a first gas, the lower gate metal burying at least a portion of the trench, forming a barrier metal on the lower gate metal, on the barrier metal, forming an upper gate metal using a second gas different from the first gas and forming a capping film on the gate metal, the capping film filling the trench.

Abstract: A method of forming a thin layer and a method of manufacturing a phase change memory device, the method of forming a thin layer including providing a first deposition source onto a substrate, the first deposition source not including tellurium; and providing a second deposition source onto the substrate, the second deposition source including a first tellurium precursor represented by the following Formula 1 and a second tellurium precursor represented by following the Formula 2: Te(CH(CH3)2)2??Formula 1 Ten(CH(CH3)2)2??Formula 2 wherein, in Formula 2, n is an integer greater than or equal to 2.

Abstract: A method of fabricating a semiconductor device may include conformally forming a gate insulating layer on a substrate having a recess, conformally forming a barrier layer containing fluorine-free tungsten nitride on the substrate with the gate insulating layer using an atomic layer deposition process, and forming a gate electrode on the barrier layer to fill at least a portion of the recess.

Abstract: A method of forming a thin layer and a method of manufacturing a phase change memory device, the method of forming a thin layer including providing a first deposition source onto a substrate, the first deposition source not including tellurium; and providing a second deposition source onto the substrate, the second deposition source including a first tellurium precursor represented by the following Formula 1 and a second tellurium precursor represented by following the Formula 2: Te(CH(CH3)2)2??Formula 1 Ten(CH(CH3)2)2??Formula 2 wherein, in Formula 2, n is an integer greater than or equal to 2.

Abstract: An active dry sensor module for measurement of bioelectricity is disclosed. The active dry sensor module of the present invention excludes the use of a conductive gel, thereby not supplying unpleasantness and discomfort to a reagent and preventing the interference of the signal due to a noise component. Further, the active dry sensor module of the present invention amplifies the biomedical signal to a desired level, thereby precisely and easily measuring the biomedical signal.

Abstract: An active dry sensor module for measurement of bioelectricity is disclosed. The active dry sensor module of the present invention excludes the use of a conductive gel, thereby not supplying unpleasantness and discomfort to a reagent and preventing the interference of the signal due to a noise component. Further, the active dry sensor module of the present invention amplifies the biomedical signal to a desired level, thereby precisely and easily measuring the biomedical signal.

Abstract: An active dry sensor module for measurement of bioelectricity is disclosed. The active dry sensor module of the present invention excludes the use of a conductive gel, thereby not supplying unpleasantness and discomfort to a reagent and preventing the interference of the signal due to a noise component. Further, the active dry sensor module of the present invention amplifies the biomedical signal to a desired level, thereby precisely and easily measuring the biomedical signal.

Abstract: The present invention relates to an apparatus for generating a clock signal with jitter and a test apparatus including the same. The apparatus for generating a clock signal with jitter in accordance with the present invention includes a voltage-controlled crystal oscillator (VCXO) for generating an output signal including jitter components based on a driving power source having a specific waveform and a controlled voltage, a phase comparator for calculating a phase difference of a reference signal and the output signal, and a loop filter for generating the controlled voltage based on the phase difference calculated by the phase comparator. Accordingly, the PLL circuit unit generates a clock signal including jitter, so that the complexity and manufacturing cost of the apparatus can be reduced.

Abstract: Provided are a method and apparatus for derate matching a rate-matched data. The received data is deinterleaved and derate matched at a time, without using input buffers or constructing input buffers in parallel. Thus, a total process time necessary for the deinterleaving process and the derate matching process is reduced, and the use of memories such as the input buffers is minimized.

Abstract: Provided are a method and apparatus for derate matching a rate-matched data. The received data is deinterleaved and derate matched at a time, without using input buffers or constructing input buffers in parallel. Thus, a total process time necessary for the deinterleaving process and the derate matching process is reduced, and the use of memories such as the input buffers is minimized.

Abstract: The present invention relates to an apparatus for generating a clock signal with jitter and a test apparatus including the same. The apparatus for generating a clock signal with jitter in accordance with the present invention includes a voltage-controlled crystal oscillator (VCXO) for generating an output signal including jitter components based on a driving power source having a specific waveform and a controlled voltage, a phase comparator for calculating a phase difference of a reference signal and the output signal, and a loop filter for generating the controlled voltage based on the phase difference calculated by the phase comparator. Accordingly, the PLL circuit unit generates a clock signal including jitter, so that the complexity and manufacturing cost of the apparatus can be reduced.

Abstract: An active dry sensor module for measurement of bioelectricity is disclosed. The active dry sensor module of the present invention excludes the use of a conductive gel, thereby not supplying unpleasantness and discomfort to a reagent and preventing the interference of the signal due to a noise component. Further, the active dry sensor module of the present invention amplifies the biomedical signal to a desired level, thereby precisely and easily measuring the biomedical signal.

Abstract: Disclosed is a mobile communication terminal having an ESD (electrostatic discharge) protection function that includes a multi-band intenna including: a main signal pattern line that transmits/receives a main frequency band signal and is formed in a meander-line shape; at least one sub signal pattern line that is formed unitarily with the main signal pattern line and transmits/receives a frequency band signal different from that of the main signal pattern line; a discharge pattern line that is provided between the main and sub signal pattern lines to form a spark gap and performs an ESD protection function; a feed point that is formed on the main signal pattern line for power feeding; and a shorting point that is formed on the discharge pattern line to discharge static electricity to a ground terminal.

Abstract: Disclosed is a mobile communication terminal having an ESD (electrostatic discharge) protection function that includes a multi-band intenna including: a main signal pattern line that transmits/receives a main frequency band signal and is formed in a meander-line shape; at least one sub signal pattern line that is formed unitarily with the main signal pattern line and transmits/receives a frequency band signal different from that of the main signal pattern line; a discharge pattern line that is provided between the main and sub signal pattern lines to form a spark gap and performs an ESD protection function; a feed point that is formed on the main signal pattern line for power feeding; and a shorting point that is formed on the discharge pattern line to discharge static electricity to a ground terminal.