Patents by Inventor Eun-Young Minn

Eun-Young Minn has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6696353
    Abstract: An integrated circuit chip having an anti-moisture-absorption film at the edge thereof and a method of forming the anti-moisture-absorption film are provided. In the integrated circuit chip which has predetermined devices inside and whose uppermost layer is covered with a passivation film, a trench is formed by etching interlayer dielectric films to a predetermined depth along the perimeter of the integrated circuit chip to be adjacent to the edge of the integrated circuit chip and an anti-moisture-absorption film is formed to fill the trench or is formed on the sidewall of the trench to a predetermined thickness, in order to prevent moisture from seeping into the edge of the integrated circuit chip. Moisture is effectively prevented from seeping into the edge of the chip by forming the anti-moisture-absorption film at the edge of the chip using the conventional processes of manufacturing the integrated circuit chip without an additional process.
    Type: Grant
    Filed: March 25, 2003
    Date of Patent: February 24, 2004
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Eun-young Minn, Young-hoon Park, Chi-Hoon Lee, Hyo-dong Ban
  • Publication number: 20030181045
    Abstract: An integrated circuit chip having an anti-moisture-absorption film at the edge thereof and a method of forming the anti-moisture-absorption film are provided. In the integrated circuit chip which has predetermined devices inside and whose uppermost layer is covered with a passivation film, a trench is formed by etching interlayer dielectric films to a predetermined depth along the perimeter of the integrated circuit chip to be adjacent to the edge of the integrated circuit chip and an anti-moisture-absorption film is formed to fill the trench or is formed on the sidewall of the trench to a predetermined thickness, in order to prevent moisture from seeping into the edge of the integrated circuit chip. Moisture is effectively prevented from seeping into the edge of the chip by forming the anti-moisture-absorption film at the edge of the chip using the conventional processes of manufacturing the integrated circuit chip without an additional process.
    Type: Application
    Filed: March 25, 2003
    Publication date: September 25, 2003
    Inventors: Eun-Young Minn, Young-Hoon Park, Chi-Hoon Lee, Hyo-Dong Ban
  • Patent number: 6566735
    Abstract: An integrated circuit chip having an anti-moisture-absorption film at the edge thereof and a method of forming the anti-moisture-absorption film are provided. In the integrated circuit chip which has predetermined devices inside and whose uppermost layer is covered with a passivation film, a trench is formed by etching interlayer dielectric films to a predetermined depth along the perimeter of the integrated circuit chip to be adjacent to the edge of the integrated circuit chip and an anti-moisture-absorption film is formed to fill the trench or is formed on the sidewall of the trench to a predetermined thickness, in order to prevent moisture from seeping into the edge of the integrated circuit chip. Moisture is effectively prevented from seeping into the edge of the chip by forming the anti-moisture-absorption film at the edge of the chip using the conventional processes of manufacturing the integrated circuit chip without an additional process.
    Type: Grant
    Filed: November 17, 2000
    Date of Patent: May 20, 2003
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Eun-young Minn, Young-hoon Park, Chi-Hoon Lee, Hyo-dong Ban
  • Patent number: 6509263
    Abstract: A method for fabricating a semiconductor device to reduce the contact resistance by enhancing the surface concentration of doped polysilicon in a semiconductor substrate divided into active and field regions, comprises the steps of forming a plurality of word lines each having a cap insulating layer with a predetermined interval between adjacent word lines on the substrate, forming source/drain impurity regions in the active regions adjacent to both sides of each of the word lines, forming insulating sidewalls on both sides of each of the word lines, forming capacitor node plugs and bit line contact plugs on the source/drain impurity regions, forming a plurality of bit lines in the direction perpendicular to the word lines with a predetermined interval between adjacent bit lines by forming bit line contact holes contacting the bit line contact plugs in a first insulating interlayer deposited on the substrate, forming storage electrode contact holes to expose the capacitor node plugs in a second insulating int
    Type: Grant
    Filed: November 14, 2000
    Date of Patent: January 21, 2003
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Young-Hoon Park, Hyun-Ju Lee, Eun-Young Minn
  • Patent number: 6509255
    Abstract: A fuse area structure in a semiconductor device and a method of forming the same are provided. A ring-shaped guard ring which surrounds a fuse opening, for preventing moisture from seeping into the side surface of the exposed fuse opening, is included. The guard ring is integrally formed with a passivation film. In order to form the guard ring, a guard ring opening etching stop film is formed on a fuse line. A guard ring opening is formed using the etching stop film, and a contact hole is formed in a peripheral circuit. A conductive material layer for forming an upper interconnection layer is formed on the entire surface of a resultant structure on which the contact hole and the guard ring opening are formed. The conductive material layer formed on the guard ring opening is removed. The exposed etching stop film is removed. Finally, a passivation film is deposited on the entire surface of the resulting structure.
    Type: Grant
    Filed: August 23, 2001
    Date of Patent: January 21, 2003
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Eun-young Minn, Young-hoon Park, Chi-hoon Lee, Myoung-hee Han
  • Patent number: 6507086
    Abstract: A fuse area structure in a semiconductor device and a method of forming the same are provided. A ring-shaped guard ring which surrounds a fuse opening, for preventing moisture from seeping into the side surface of the exposed fuse opening, is included. The guard ring is integrally formed with a passivation film. In order to form the guard ring, a guard ring opening etching stop film is formed on a fuse line. A guard ring opening is formed using the etching stop film, and a contact hole is formed in a peripheral circuit. A conductive material layer for forming an upper interconnection layer is formed on the entire surface of a resultant structure on which the contact hole and the guard ring opening are formed. The conductive material layer formed on the guard ring opening is removed. The exposed etching stop film is removed. Finally, a passivation film is deposited on the entire surface of the resulting structure.
    Type: Grant
    Filed: November 17, 2000
    Date of Patent: January 14, 2003
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Eun-young Minn, Young-hoon Park, Chi-hoon Lee, Myoung-hee Han
  • Publication number: 20010055848
    Abstract: A fuse area structure in a semiconductor device and a method of forming the same are provided. A ring-shaped guard ring which surrounds a fuse opening, for preventing moisture from seeping into the side surface of the exposed fuse opening, is included. The guard ring is integrally formed with a passivation film. In order to form the guard ring, a guard ring opening etching stop film is formed on a fuse line. A guard ring opening is formed using the etching stop film, and a contact hole is formed in a peripheral circuit. A conductive material layer for forming an upper interconnection layer is formed on the entire surface of a resultant structure on which the contact hole and the guard ring opening are formed. The conductive material layer formed on the guard ring opening is removed. The exposed etching stop film is removed. Finally, a passivation film is deposited on the entire surface of the resulting structure.
    Type: Application
    Filed: August 23, 2001
    Publication date: December 27, 2001
    Inventors: Eun-Young Minn, Young-Hoon Park, Chi-Hoon Lee, Myoung-Hee Han
  • Publication number: 20010009786
    Abstract: A contact in a semiconductor memory device is formed on an active region of a cell array region, rather than on a sloped area between the cell array region and a core region. Preferably, an insulating layer on the active region is etched to form a hole therein and the contact formed through the hole. Preferably, the etching is performed using an etch solution having a high etch selectivity between the insulating layer and a top layer of the active region. Thus, the contact is evenly formed and the area of the cell array region is reduced, thereby enabling cells to be packed on a chip with high density.
    Type: Application
    Filed: March 23, 2001
    Publication date: July 26, 2001
    Inventor: Eun-Young Minn
  • Patent number: 6218697
    Abstract: A contact in a semiconductor memory device is formed on an active region of a cell array region, rather than on a sloped area between the cell array region and a core region. Preferably, an insulating layer on the active region is etched to form a hole therein and the contact formed through the hole. Preferably, the etching is performed using an etch solution having a high etch selectivity between the insulating layer and a top layer of the active region. Thus, the contact is evenly formed and the area of the cell array region is reduced, thereby enabling cells to be packed on a chip with high density.
    Type: Grant
    Filed: December 29, 1998
    Date of Patent: April 17, 2001
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Eun-Young Minn
  • Patent number: RE46549
    Abstract: An integrated circuit chip having an anti-moisture-absorption film at the edge thereof and a method of forming the anti-moisture-absorption film are provided. In the integrated circuit chip which has predetermined devices inside and whose uppermost layer is covered with a passivation film, a trench is formed by etching interlayer dielectric films to a predetermined depth along the perimeter of the integrated circuit chip to be adjacent to the edge of the integrated circuit chip and an anti-moisture-absorption film is formed to fill the trench or is formed on the sidewall of the trench to a predetermined thickness, in order to prevent moisture from seeping into the edge of the integrated circuit chip. Moisture is effectively prevented from seeping into the edge of the chip by forming the anti-moisture-absorption film at the edge of the chip using the conventional processes of manufacturing the integrated circuit chip without an additional process.
    Type: Grant
    Filed: September 12, 2013
    Date of Patent: September 12, 2017
    Assignee: Conversant Intellectual Property Management Inc.
    Inventors: Eun-Young Minn, Young-Hoon Park, Chi-Hoon Lee, Hyo-Dong Ban