Patents by Inventor EUNG-GWAN KIM

EUNG-GWAN KIM has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Methods of manufacturing semiconductor devices by forming source/drain regions before gate electrode separation
    Patent number: 9935017
    Abstract: Spaced apart first and second fins are formed on a substrate. An isolation layer is formed on the substrate between the first and second fins. A gate electrode is formed on the isolation layer and crossing the first and second fins. Source/drain regions are formed on the first and second fins adjacent the gate electrode. After forming the source/drain regions, a portion of the gate electrode between the first and second fins is removed to expose the isolation layer. The source/drain regions may be formed by epitaxial growth.
    Type: Grant
    Filed: April 18, 2017
    Date of Patent: April 3, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jung-Gun You, Eung-Gwan Kim, Jeong-Yun Lee
  • METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES BY FORMING SOURCE/DRAIN REGIONS BEFORE GATE ELECTRODE SEPARATION
    Publication number: 20170221771
    Abstract: Spaced apart first and second fins are formed on a substrate. An isolation layer is formed on the substrate between the first and second fins. A gate electrode is formed on the isolation layer and crossing the first and second fins. Source/drain regions are formed on the first and second fins adjacent the gate electrode. After forming the source/drain regions, a portion of the gate electrode between the first and second fins is removed to expose the isolation layer. The source/drain regions may be formed by epitaxial growth.
    Type: Application
    Filed: April 18, 2017
    Publication date: August 3, 2017
    Inventors: JUNG-GUN YOU, EUNG-GWAN KIM, JEONG-YUN LEE
  • Methods of manufacturing semiconductor devices by forming source/drain regions before gate electrode separation
    Patent number: 9659827
    Abstract: Spaced apart first and second fins are formed on a substrate. An isolation layer is formed on the substrate between the first and second fins. A gate electrode is formed on the isolation layer and crossing the first and second fins. Source/drain regions are formed on the first and second fins adjacent the gate electrode. After forming the source/drain regions, a portion of the gate electrode between the first and second fins is removed to expose the isolation layer. The source/drain regions may be formed by epitaxial growth.
    Type: Grant
    Filed: July 20, 2015
    Date of Patent: May 23, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jung-Gun You, Eung-Gwan Kim, Jeong-Yun Lee
  • METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES BY FORMING SOURCE/DRAIN REGIONS BEFORE GATE ELECTRODE SEPARATION
    Publication number: 20160020150
    Abstract: Spaced apart first and second fins are formed on a substrate. An isolation layer is formed on the substrate between the first and second fins. A gate electrode is formed on the isolation layer and crossing the first and second fins. Source/drain regions are formed on the first and second fins adjacent the gate electrode. After forming the source/drain regions, a portion of the gate electrode between the first and second fins is removed to expose the isolation layer. The source/drain regions may be formed by epitaxial growth.
    Type: Application
    Filed: July 20, 2015
    Publication date: January 21, 2016
    Inventors: JUNG-GUN YOU, EUNG-GWAN KIM, JEONG-YUN LEE