Patents by Inventor Eung-Suek Lee

Eung-Suek Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11973072
    Abstract: A display device includes: a base layer including a display area including an emission area and a non-emission area adjacent to the emission area, and a non-display area around the display area; a light emitting element in the emission area on the base layer; a color filter layer located above the light emitting element; and a light blocking pattern on the light emitting element and including a first light blocking pattern in the non-emission area and a second light blocking pattern in the non-display area. The first light blocking pattern and the second light blocking pattern are different in thickness from each other.
    Type: Grant
    Filed: June 24, 2021
    Date of Patent: April 30, 2024
    Assignee: Samsung Display Co., Ltd.
    Inventors: Eung Gyu Lee, Jin Suek Kim, Sae Ron Park, Seung Bo Shim, Ho Kil Oh, Jae Soo Jang
  • Patent number: 9837343
    Abstract: A chip embedded substrate includes: an insulating layer having outer layer circuit patterns provided on any one of an upper surface and a lower surface thereof; a chip embedded in the insulating layer; and internal circuit patterns included in the insulating layer and disposed between a height of a top surface of the chip and a height of a bottom surface thereof.
    Type: Grant
    Filed: June 29, 2015
    Date of Patent: December 5, 2017
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Joon Sung Kim, Yong Ho Baek, Jung Hyun Cho, Eung Suek Lee, Jae Hoon Choi, Young Gwan Ko
  • Patent number: 9673066
    Abstract: An apparatus for manufacturing a semiconductor package module and a method of manufacturing a semiconductor package are provided. The apparatus for manufacturing a semiconductor package module includes a lower mold installed thereon with a board with at least one element mounted thereon, an upper mold, in a state of accommodating the board, provided above the board, a filler supplier disposed in at least one of the upper mold and the lower mold, and supplying a filler to a molding space between the board and the upper mold, and a pattern forming member provided in an inner surface of the upper mold that provides an uneven pattern on a molded part.
    Type: Grant
    Filed: January 4, 2016
    Date of Patent: June 6, 2017
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: No Il Park, Seung Wook Park, Eung Suek Lee, Tae Sung Jeong
  • Publication number: 20170033039
    Abstract: A semiconductor package includes a first substrate, a pattern layer disposed on the first substrate, a first chip member disposed on a surface of the first substrate, lead frames mounted on the first substrate surrounding the first chip member, and a first encapsulation layer disposed on the first substrate, encapsulating the first chip member and the lead frame, wherein upper end portions of the lead frame and the first encapsulation layer are removed, and lead frame columns are exposed through the first encapsulation layer.
    Type: Application
    Filed: March 18, 2016
    Publication date: February 2, 2017
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Ki Ju LEE, Jun Woo MYUNG, No Il PARK, Jin Su KIM, Eung Suek LEE, Jae Hyun LIM
  • Publication number: 20170004980
    Abstract: An apparatus for manufacturing a semiconductor package module and a method of manufacturing a semiconductor package are provided. The apparatus for manufacturing a semiconductor package module includes a lower mold installed thereon with a board with at least one element mounted thereon, an upper mold, in a state of accommodating the board, provided above the board, a filler supplier disposed in at least one of the upper mold and the lower mold, and supplying a filler to a molding space between the board and the upper mold, and a pattern forming member provided in an inner surface of the upper mold that provides an uneven pattern on a molded part.
    Type: Application
    Filed: January 4, 2016
    Publication date: January 5, 2017
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: No Il PARK, Seung Wook PARK, Eung Suek LEE, Tae Sung JEONG
  • Publication number: 20160037619
    Abstract: There are provided a carrier substrate including: a first metal layer; a barrier layer formed on one surface of the first carrier metal layer; and a second metal layer formed on one surface of the barrier layer, and a method of manufacturing a printed circuit board using the same.
    Type: Application
    Filed: June 9, 2015
    Publication date: February 4, 2016
    Inventors: Yong Ho BAEK, Young Gwan KO, Jae Hoon CHOI, Il Jong SEO, Sung Uk LEE, Eung Suek LEE
  • Publication number: 20160007449
    Abstract: Disclosed herein is a chip embedded substrate including: an insulating layer having outer layer circuit patterns provided on any one of an upper surface and a lower surface thereof; a chip embedded in the insulating layer; and internal circuit patterns included in the insulating layer and disposed between a height of a top surface of the chip and a height of a bottom surface thereof.
    Type: Application
    Filed: June 29, 2015
    Publication date: January 7, 2016
    Inventors: Joon Sung KIM, Yong Ho BAEK, Jung Hyun CHO, Eung Suek LEE, Jae Hoon CHOI, Young Gwan KO
  • Publication number: 20150373833
    Abstract: There are provided a printed circuit board and a method of manufacturing the same. According to an exemplary embodiment of the present disclosure, a printed circuit board includes: an insulating layer; a first outer layer circuit pattern formed in a lower portion of the insulating layer to be embedded in the insulating layer; and a second outer layer circuit pattern formed on the insulating layer to protrude from the insulating layer.
    Type: Application
    Filed: September 16, 2014
    Publication date: December 24, 2015
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Yong Ho BAEK, Hyo Seung Nam, Jae Hoon Choi, Eung Suek Lee, Jeong Ho Lee
  • Publication number: 20150195902
    Abstract: There are provided a printed circuit board and a method of manufacturing the same. The printed circuit board according to an exemplary embodiment of the present disclosure includes: an insulating layer; a first circuit buried below the insulating layer and having a lower surface formed to be exposed from a lower surface of the insulating layer; a second circuit layer formed on the insulating layer; and a first solder resist layer formed below the insulating layer and the first circuit layer and formed to expose a portion of the first circuit layer.
    Type: Application
    Filed: January 8, 2015
    Publication date: July 9, 2015
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Eung Suek LEE, Hyo Seung NAM, Sung Uk LEE, Jae Hoon CHOI, II Jong SEO, Yong Ho BAEK
  • Publication number: 20150129289
    Abstract: There are provided a printed circuit board and a method of manufacturing the same. The printed circuit board according to an exemplary embodiment of the present disclosure includes: a substrate; a metal root layer formed by injecting and depositing metal particles into and on the substrate; and a circuit layer formed on the metal root layer.
    Type: Application
    Filed: November 7, 2014
    Publication date: May 14, 2015
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Gun Woo Kim, Eung Suek Lee, Yoong Oh, Sung Uk Lee
  • Publication number: 20140106510
    Abstract: In accordance with various embodiments, there is provided a method of fabricating a die mounting substrate, including the steps of preparing a mounting substrate including a pad and a die including a terminal, and printing a conductive paste bump on one of the pad or the terminal. The method further includes the step of connecting the pad and the terminal to each other using the conductive paste bump, thereby surface-mounting the die on the mounting substrate.
    Type: Application
    Filed: December 16, 2013
    Publication date: April 17, 2014
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Eung Suek LEE, Jee Soo MOK, Jun Oh HWANG
  • Patent number: 8633396
    Abstract: Disclosed is a die mounting substrate, which includes a mounting substrate having a pad, a die having a terminal and surface-mounted on the mounting substrate, and a conductive paste bump formed on the pad or the terminal so as to connect the pad and the terminal to each other. When the die is connected and mounted on the mounting substrate using the conductive paste bump, shear stress is relieved thus preventing reliability from decreasing due to a difference in the coefficient of thermal expansion between the die and the mounting substrate, and also preventing the force of adhesion of the bump from decreasing due to the reduction in size of the pad of the mounting substrate.
    Type: Grant
    Filed: February 26, 2010
    Date of Patent: January 21, 2014
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Eung Suek Lee, Jee Soo Mok, Jun Oh Hwang
  • Patent number: 8592135
    Abstract: A method of manufacturing a printed circuit board, including: applying a conductive paste including carbon nanotubes and a photosensitive binder on a bump-forming area of a circuit substrate having a circuit layer for transferring electrical signals; and patterning the conductive paste, thus forming bumps.
    Type: Grant
    Filed: February 23, 2012
    Date of Patent: November 26, 2013
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jee Soo Mok, Je Gwang Yoo, Eung Suek Lee, Chang Sup Ryu
  • Patent number: 8415200
    Abstract: Disclosed herein is a method for manufacturing a semiconductor package which uses a base member 120 in which a first metal layer 113, a barrier layer 115, and a second metal layer 117 are stacked on both surface thereof in sequence based on an adhesive member 111 to simultaneously manufacture two printed circuit boards through a single sheet process, thereby making it possible to improve manufacturing efficiency; electrically connects a semiconductor chip 300 to a printed circuit board through a solder bump 250, thereby making it possible to implement a high-density package substrate; and forms a metal post 140 instead of a through hole to required in an interlayer circuit connection, thereby making it possible to reduce costs required in the processing/plating of the through hole.
    Type: Grant
    Filed: January 14, 2011
    Date of Patent: April 9, 2013
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Mi Sun Hwang, Keung Jin Sohn, Eung Suek Lee, Myung Sam Kang
  • Patent number: 8377748
    Abstract: A method of manufacturing a cooling fin and package substrate that includes preparing a mold, which has a support base and a resin layer formed on the support base and including on a side thereof a groove, which is configured to form a cooling fin; printing fireable paste containing a carbon component on a side of the mold that has the groove configured to form a cooling fin; removing the support base to leave a cooling object; and firing the cooling object.
    Type: Grant
    Filed: September 1, 2011
    Date of Patent: February 19, 2013
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Eung Suek Lee, Je Gwang Yoo, Chang Sup Ryu, Jun Oh Hwang, Jun Heyoung Park, Jee Soo Mok
  • Publication number: 20120168205
    Abstract: A printed circuit board and a method for manufacturing the printed circuit board are disclosed. The method can include; providing an insulated layer, in which a first metal layer is formed on one side of the insulated layer; forming a groove on the insulated layer; forming a metallic substance on an inner side of the groove and on another side of the insulated layer; and forming a first circuit pattern on at least one of one side of the insulated layer and the metallic substance formed on the groove by removing a portion of the first metal layer. The present invention provides the printed circuit board having a high efficiency of heat emission by disposing a heat sink in direct contact with a board and the method of manufacturing the printed circuit board.
    Type: Application
    Filed: March 16, 2012
    Publication date: July 5, 2012
    Applicant: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jun-Oh HWANG, Jee-Soo Mok, Jun-Heyoung Park, Kyung-Ah Lee, Eung-Suek Lee
  • Publication number: 20120148960
    Abstract: A method of manufacturing a printed circuit board, including: applying a conductive paste including carbon nanotubes and a photosensitive binder on a bump-forming area of a circuit substrate having a circuit layer for transferring electrical signals; and patterning the conductive paste, thus forming bumps.
    Type: Application
    Filed: February 23, 2012
    Publication date: June 14, 2012
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jee Soo Mok, Je Gwang Yoo, Eung Suek Lee, Chang Sup Ryu
  • Publication number: 20120103671
    Abstract: Disclosed herein are a printed circuit board and a method for manufacturing the same capable of implementing a slim and small semiconductor package by the printed circuit board configured to include a circuit layer and an insulating layer as a single layer and shortening a process time and reducing processing costs by forming a bump using a screen printing method. Further, disclosed herein is a method for manufacturing a printed circuit board capable of improving a warpage problem of the printed circuit board that occurs during a polishing process by adopting a coining process instead of a polishing process.
    Type: Application
    Filed: January 14, 2011
    Publication date: May 3, 2012
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Eung Suek LEE, Kwang Seop YOUM, Keung Jin SOHN, Mi Sun HWANG
  • Patent number: 8166647
    Abstract: A printed circuit board and a method for manufacturing the printed circuit board are disclosed. The method can include; providing an insulated layer, in which a first metal layer is formed on one side of the insulated layer; forming a groove on the insulated layer; forming a metallic substance on an inner side of the groove and on another side of the insulated layer; and forming a first circuit pattern on at least one of one side of the insulated layer and the metallic substance formed on the groove by removing a portion of the first metal layer. The present invention provides the printed circuit board having a high efficiency of heat emission by disposing a heat sink in direct contact with a board and the method of manufacturing the printed circuit board.
    Type: Grant
    Filed: January 12, 2009
    Date of Patent: May 1, 2012
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jun-Oh Hwang, Jee-Soo Mok, Jun-Heyoung Park, Kyung-Ah Lee, Eung-Suek Lee
  • Publication number: 20120088334
    Abstract: Disclosed herein is a method for manufacturing a semiconductor package which uses a base member 120 in which a first metal layer 113, a barrier layer 115, and a second metal layer 117 are stacked on both surface thereof in sequence based on an adhesive member 111 to simultaneously manufacture two printed circuit boards through a single sheet process, thereby making it possible to improve manufacturing efficiency; electrically connects a semiconductor chip 300 to a printed circuit board through a solder bump 250, thereby making it possible to implement a high-density package substrate; and forms a metal post 140 instead of a through hole to required in an interlayer circuit connection, thereby making it possible to reduce costs required in the processing/plating of the through hole.
    Type: Application
    Filed: January 14, 2011
    Publication date: April 12, 2012
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Mi Sun HWANG, Keung Jin SOHN, Eung Suek LEE, Myung Sam KANG