Patents by Inventor Eungjung Yoon

Eungjung Yoon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7374986
    Abstract: In a field effect transistor (FET), and a method of fabricating the same, the FET includes a semiconductor substrate, source and drain regions formed on the semiconductor substrate, a plurality of wire channels electrically connecting the source and drain regions, the plurality of wire channels being arranged in two columns and at least two rows, and a gate dielectric layer surrounding each of the plurality of wire channels and a gate electrode surrounding the gate dielectric layer and each of the plurality of wire channels.
    Type: Grant
    Filed: September 21, 2007
    Date of Patent: May 20, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sungmin Kim, Ming Li, Eungjung Yoon
  • Publication number: 20080020537
    Abstract: In a field effect transistor (FET), and a method of fabricating the same, the FET includes a semiconductor substrate, source and drain regions formed on the semiconductor substrate, a plurality of wire channels electrically connecting the source and drain regions, the plurality of wire channels being arranged in two columns and at least two rows, and a gate dielectric layer surrounding each of the plurality of wire channels and a gate electrode surrounding the gate dielectric layer and each of the plurality of wire channels.
    Type: Application
    Filed: September 21, 2007
    Publication date: January 24, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sungmin Kim, Ming Li, Eungjung Yoon
  • Patent number: 7274051
    Abstract: In a field effect transistor (FET), and a method of fabricating the same, the FET includes a semiconductor substrate, source and drain regions formed on the semiconductor substrate, a plurality of wire channels electrically connecting the source and drain regions, the plurality of wire channels being arranged in two columns and at least two rows, and a gate dielectric layer surrounding each of the plurality of wire channels and a gate electrode surrounding the gate dielectric layer and each of the plurality of wire channels.
    Type: Grant
    Filed: March 9, 2005
    Date of Patent: September 25, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sungmin Kim, Ming Li, Eungjung Yoon
  • Publication number: 20060049429
    Abstract: In a field effect transistor (FET), and a method of fabricating the same, the FET includes a semiconductor substrate, source and drain regions formed on the semiconductor substrate, a plurality of wire channels electrically connecting the source and drain regions, the plurality of wire channels being arranged in two columns and at least two rows, and a gate dielectric layer surrounding each of the plurality of wire channels and a gate electrode surrounding the gate dielectric layer and each of the plurality of wire channels.
    Type: Application
    Filed: March 9, 2005
    Publication date: March 9, 2006
    Inventors: Sungmin Kim, Ming Li, Eungjung Yoon